BATTERY PROTECTION IC FOR 1-CELL PACK
S-8241 Series
Rev.7.6_00
Pin Configurations
Table 5
SOT-23-5
Top view
Pin No.
1
Symbol
VM
Description
5
4
Voltage detection pin between VM and VSS
(Overcurrent detection pin)
Positive power input pin
Negative power input pin
2
3
VDD
VSS
FET gate connection pin for discharge control
(CMOS output)
FET gate connection pin for charge control
(CMOS output)
4
5
DO
CO
1
2
3
Figure 2
Table 6
SNT-6A
Top view
Pin No.
1
Symbol
NC*1
Description
No connection
1
2
3
6
5
4
FET gate connection pin for charge control
2
CO
(CMOS output)
FET gate connection pin for discharge control
(CMOS output)
3
DO
4
5
VSS
VDD
Negative power input pin
Positive power input pin
Voltage detection pin between VM and VSS
(Overcurrent detection pin)
Figure 3
6
VM
*1. The NC pin is electrically open.
The NC pin can be connected to VDD or VSS.
8
Seiko Instruments Inc.
SII [ SEIKO INSTRUMENTS INC ]
