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S-24CS08AFJ-TB-1G 参数 Datasheet PDF下载

S-24CS08AFJ-TB-1G图片预览
型号: S-24CS08AFJ-TB-1G
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS 2线串行E2PROM [2-WIRE CMOS SERIAL E2PROM]
分类和应用: 内存集成电路光电二极管ISM频段可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 47 页 / 682 K
品牌: SII [ SEIKO INSTRUMENTS INC ]
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2-WIRE CMOS SERIAL E2PROM  
S-24CS01A/02A/04A/08A  
Rev.4.4_00  
3. Matching phases while E2PROM is accessed  
The S-24CS01A/02A/04A/08A does not have a pin for resetting (the internal circuit), therefore, the  
E2PROM cannot be forcibly reset externally. If a communication interruption occurs in the E2PROM, it  
must be reset by software.  
For example, even if a reset signal is input to the microprocessor, the internal circuit of the E2PROM is not  
reset as long as the stop condition is not input to the E2PROM. In other words, the E2PROM retains the  
same status and cannot shift to the next operation. This symptom applies to the case when only the  
microprocessor is reset when the power supply voltage drops. With this status, if the power supply voltage  
is restored, reset the E2PROM (after matching the phase with the microprocessor) and input an instruction.  
The following shows this reset method.  
[How to reset E2PROM]  
The E2PROM can be reset by the start and stop instructions. When the E2PROM is reading data “0” or  
is outputting the acknowledge signal, 0 is output to the SDA line. In this status, the microprocessor  
cannot output an instruction to the SDA line. In this case, terminate the acknowledge output operation  
or read operation, and then input a start instruction. Figure 26 shows this procedure.  
First, input the start condition. Then transmit 9 clocks (dummy clocks) of SCL. During this time, the  
microprocessor sets the SDA line to high level. By this operation, the E2PROM interrupts the  
acknowledge output operation or data output, so input the start condition*1. When a start condition is  
input, the E2PROM is reset. To make doubly sure, input the stop condition to the E2PROM. Normal  
operation is then possible.  
Start  
condition  
Stop  
condition  
Start  
condition  
Dummy clock  
1
2
8
9
SCL  
SDA  
Figure 26 Resetting E2PROM  
*1. After 9 clocks (dummy clocks), if the SCL clock continues to be output without a start condition  
being input, a write operation may be started upon receipt of a stop condition. To prevent this, input  
a start condition after 9 clocks (dummy clocks).  
Remark It is recommended to perform the above reset using dummy clocks when the system is  
initialized after the power supply voltage has been raised.  
22  
Seiko Instruments Inc.  
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