SAB 82525
SAB 82526
SAF 82525
SAF 82526
Register : TSAR
TSAX
TSNR
TSNX
RCS2 RCS1 RCS0
XCS2 XCS1 XCS0
CCR2
Time Slot Number
TSN (6 Bits)
Clock Shift
CS (3 Bits)
9 Bits
CD
R x CLK
TIME SLOT
N
T x CLK
DELAY
WIDTH
1+ SNx8 + CS
(1...512 Clocks)
Via RCCR, XCCR
(1...256 Clocks)
ITD00240
Figure 23
Location of Time-Slots
The transmit time-slot is additionally indicated by a control signal via T × CLK, which output is
set to log 0 during the transmit window.
Note: In extended transparent mode the width of the time-slots has to be n × 8 bit.
Semiconductor Group
51