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AOL1413 参数 Datasheet PDF下载

AOL1413图片预览
型号: AOL1413
PDF下载: 下载PDF文件 查看货源
内容描述: P沟道增强型场 [P-Channel Enhancement Mode Field]
分类和应用: 晶体晶体管开关脉冲光电二极管
文件页数/大小: 6 页 / 465 K
品牌: SHENZHENFREESCALE [ ShenZhen FreesCale Electronics. Co., Ltd ]
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AOL1413
P-Channel Enhancement Mode Field
Effect Transistor
Electrical Characteristics (T
J
=25°C unless otherwise noted)
Symbol
Parameter
Conditions
I
D
=-250uA, V
GS
=0V
V
DS
=-30V, V
GS
=0V
T
J
=55°C
V
DS
=0V, V
GS
= ±25V
V
DS
=V
GS
I
D
=-250µA
V
GS
=-10V, V
DS
=-5V
V
GS
=-10V, I
D
=-20A
R
DS(ON)
g
FS
V
SD
I
S
Static Drain-Source On-Resistance
V
GS
=-5V, I
D
=-20A
Forward Transconductance
V
DS
=-5V, I
D
=20A
I
S
=1A,V
GS
=0V
Diode Forward Voltage
Maximum Body-Diode Continuous Current
T
J
=125°C
-1.5
-70
13.5
18.5
28
27
-0.72
-1
-38
1760
V
GS
=0V, V
DS
=-15V, f=1MHz
V
GS
=0V, V
DS
=0V, f=1MHz
360
255
6.4
30
V
GS
=-10V, V
DS
=-15V, I
D
=-20A
11
7
8
11.5
V
GS
=-10V, V
DS
=-15V, R
L
=0.75Ω,
R
GEN
=3Ω
I
F
=-20A, dI/dt=100A/µs
8
35
18.5
24
16
30
8
38
2200
17
24
36
S
V
A
pF
pF
pF
nC
nC
nC
nC
ns
ns
ns
ns
ns
nC
-2.5
Min
-30
-1
-5
±10
-3.5
Typ
Max
Units
V
µA
uA
V
A
mΩ
STATIC PARAMETERS
BV
DSS
Drain-Source Breakdown Voltage
I
DSS
I
GSS
V
GS(th)
I
D(ON)
Zero Gate Voltage Drain Current
Gate-Body leakage current
Gate Threshold Voltage
On state drain current
DYNAMIC PARAMETERS
C
iss
Input Capacitance
C
oss
C
rss
R
g
Output Capacitance
Reverse Transfer Capacitance
Gate resistance
SWITCHING PARAMETERS
Q
g
(10V) Total Gate Charge
Q
g
(4.5V) Total Gate Charge
Q
gs
Q
gd
t
D(on)
t
r
t
D(off)
t
f
t
rr
Q
rr
Gate Source Charge
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge I
F
=-20A, dI/dt=100A/µs
A. The value of R
θJA
is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T =25°C. The Power
A
dissipation P
DSM
is based on t<10s R
θJA
and the maximum allowed junction temperature of 150°C. The value in any given application depends on the
user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.
B. The power dissipation P
D
is based on T
J(MAX)
=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation
limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature T
J(MAX)
=175°C.
D. The R
θJA
is the sum of the thermal impedence from junction to case R
θJC
and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 us pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a
maximum junction temperature of T
J(MAX)
=175°C. The SOA curve provides a single pulse rating.
G. The maximum current rating is limited by bond-wires.
H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T=25°C.
A
ST
* This device is guaranteed green after date code 8P11 (June 1 2008)
Rev3:April, 2008
2/6
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