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E0C63P466D 参数 Datasheet PDF下载

E0C63P466D图片预览
型号: E0C63P466D
PDF下载: 下载PDF文件 查看货源
内容描述: [4-BIT, FLASH, 4.1MHz, MICROCONTROLLER, UUC140, DIE-140]
分类和应用: 时钟外围集成电路
文件页数/大小: 16 页 / 141 K
品牌: SEIKO [ SEIKO EPSON CORPORATION ]
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E0C63P466
q
SVD Circuit
The E0C63P466 has a built-in SVD (Supply Voltage Detection) circuit with the same configuration as that of the
mask ROM model (E0C634xx). However, the mask option is fixed at "with external voltage detection".
The following table lists the criteria voltages.
SVDS3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
SVDS2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
SVDS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
SVDS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Criteria voltage (V)
E0C63P466
E0C634xx
1.05 (external voltage)
2.80
2.90
3.00
3.10
3.20
3.30
1.85/1.05
1.90
2.00
2.10
2.20
2.30
2.40
2.50
2.60
2.70
2.80
2.90
3.00
3.10
3.20
3.30
A criteria voltage can be set using the SVDS0–SVDS3 register (I/O memory address: FF04H).
Since the minimum operating voltage of the E0C63P466 is 2.7V, 2.7V or less criteria voltages are not available.
Be aware that the SVD circuit in the E0C63P466 may not operate when a 2.7V or less criteria voltage is selected.
For the software control sequence of the SVD circuit, refer to the "E0C634xx Technical Manual".
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