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E0C6274D 参数 Datasheet PDF下载

E0C6274D图片预览
型号: E0C6274D
PDF下载: 下载PDF文件 查看货源
内容描述: [4-BIT, MROM, 1.3MHz, MICROCONTROLLER, UUC, DIE]
分类和应用: 时钟外围集成电路
文件页数/大小: 12 页 / 118 K
品牌: SEIKO [ SEIKO EPSON CORPORATION ]
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E0C6274
q
DC Characteristics
(Unless otherwise specified: V
DD
=3.0V, V
SS
=0V, f
OSC1
=32.768kHz, Ta=25°C, V
D1
/V
C1
–V
C3
are internal voltage, C1–C6=0.1µF)
Condition
Unit
Max.
Characteristic
Symbol
Min.
Typ.
K00–K03, K10, SIN, SCLK
V
V
DD
High level input voltage (1)
V
IH1
0.8•V
DD
P00–P03, P10–P13, P20–P23
RESET, TEST
V
High level input voltage (2)
V
IH2
0.9•V
DD
V
DD
K00–K03, K10, SIN, SCLK
V
Low level input voltage (1)
V
IL1
0
0.2•V
D
P00–P03, P10–P13, P20–P23
RESET, TEST
V
Low level input voltage (2)
0
V
IL2
0.1•V
DD
K00–K03, K10, SIN, SCLK
µA
High level input current
0
I
IH
V
IH
=3.0V
0.5
P00–P03, P10–P13, P20–P23
RESET, TEST
K00–K03, K10, SIN, SCLK
µA
Low level input current (1)
-20
V
IL1
=V
SS
-10
-5
I
IL1
With pull up resistor P00–P03, P10–P13, P20–P23
RESET
K00–K03, K10, SIN, SCLK
µA
Low level input current (2)
-0.5
0
I
IL2
V
IL2
=V
SS
P00–P03, P10–P13, P20–P23
No pull up resistor
R00, R01, P00–P03, P10–P13
mA
High level output current (1) I
OH1
-0.9
V
OH1
=0.9•V
DD
P20–P23, SOUT, SCLK, SRDY
R02, R03
mA
High level output current (2) I
OH2
-1.8
V
OH2
=0.9•V
DD
R00, R01, P00–P03, P10–P13
mA
Low level output current (1)
3.0
I
OL1
V
OL1
=0.1•V
DD
P20–P23, SOUT, SCLK, SRDY
R02, R03
mA
Low level output current (2)
6.0
I
OL2
V
OL2
=0.1•V
DD
COM0–COM3
µA
Common output current
-3
I
OH3
V
OH3
=V
C3
-0.05V
µA
3
V
OL3
=0.05V
I
OL3
SEG0–SEG31
µA
Segment output current
-3
I
OH4
V
OH4
=V
C3
-0.05V
µA
(during LCD output)
3
V
OL4
=0.05V
I
OL4
SEG0–SEG31
mA
Segment output current
-0.2
I
OH5
V
OH5
=0.9•V
DD
mA
(during DC output)
0.2
I
OL5
V
OL5
=0.1•V
DD
q
Analog Circuit Characteristics and Current Consumption
(Unless otherwise specified: V
DD
=V
DDA
=3.0V, V
SS
=V
SSA
=0V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
D1
/V
C1
–V
C3
are internal voltage, C1–C6=0.1µF)
Unit
Characteristic
Symbol
Min.
Typ.
Condition
Max.
V
Internal voltage
V
C1
0.95
1.05
V
CA
=V
C1
, I
C1
=-5µA
1.15
V
2•V
C1
V
C2
Connect 1MΩ load resistor between V
SS
and V
C2
2•V
C1
(without panel load)
×0.9
+0.1
V
Connect 1MΩ load resistor between V
SS
and V
C3
3•V
C1
3•V
C1
V
C3
(without panel load)
×0.9
+0.1
V
V
SVD
SVDS="0"
SVD voltage
2.5
2.6
2.7
V
SVDS="1"
2.4
2.5
2.6
V
SVDS="2"
2.3
2.4
2.5
V
SVDS="3"
2.2
2.3
2.4
µS
t
SVD
SVD circuit response time
100
µA
I
OP
Current consumption
During SLEEP
0.7
2.0
µA
During HALT (32kHz)
2.0
7.0
Current that flows in
1
µA
During execution (32kHz)
*
6.0
15.0
external parts (loads)
µA
During execution (1MHz)
*
1
200
500
such as the LCD
2
µA
During execution (32kHz)
*
306
915
panel is not included.
µA
During execution (32kHz)
*
3
506
1515
µA
During execution (32kHz)
*
4
16.0
45.0
∗1:
The SVD, A/D converter and AMP circuits are OFF status.
∗2:
The A/D converter (reference voltage V
R1
and middle electric potential GND are supplied from outside) is ON status. The SVD and
AMP circuits are OFF status.
∗3:
The A/D converter (reference voltage V
R1
and middle electric potential GND are supplied from outside) and AMP circuits (2 systems)
are ON status. The SVD circuit is OFF status.
∗4:
The SVD circuit is ON status. The A/D converter and AMP circuits are OFF status.
5