PF590-06
E0C6274
4-bit Single Chip Microcomputer
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Wi pera cts
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Core CPU Architecture
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Dual Slope Type A/D Converter
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Reference Voltage Generation Circuit
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General Purpose Operating Amplifier
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SVD Circuit
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DESCRIPTION
The E0C6274 is a single-chip microcomputer made up of the 4-bit core CPU E0C6200A, ROM, RAM, LCD
driver, input ports, output ports, I/O ports, clock timer, stopwatch timer, programmable timer, clock-synchro-
nized serial interface, general purpose operational amplifier, dual slope type A/D converter and watchdog timer.
Because of its low-voltage operation and low power consumption, this series is ideal for a wide range of applica-
tions, and is especially suitable for battery-driven systems.
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FEATURES
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CMOS LSI 4-bit parallel processing
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Clock ..................................................... 32.768kHz/1MHz (Typ.)
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Instruction set ........................................ 109 instructions
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Instruction execution time ..................... When operated 32kHz : 153µsec, 214µsec, 366µsec
When operated 1MHz : 5µsec, 7µsec, 12µsec
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ROM capacity ....................................... 4,096 words, 12 bits per word
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RAM capacity ........................................ 512 words, 4 bits per word
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A/D converter ........................................ Dual slope A/D converter
Resolution/conversion speed: programmable
(Need changed external parts)
6400 count: 500ms/3200 count: 250ms
1600 count: 125ms/800 count: 62.5ms
A/D conversion accuracy: ±0.2%
(Zone of temperature: 0°C to 50°C)
Analog measuring: programmable
(Voltage/difference voltage/resistor: measuring)
Analog voltage inputs: 5 channels
Reference voltage generation circuit
Middle electric potential (GND) generation circuit
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Built-in operational amplifier ................. 2 MOS input Op-Amps
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Input port ............................................... 5 bits
(Selected by mask option: with or without pull-up resistor)
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Output port ............................................ 4 bits
(Clock output and buzzer output are available by mask option)
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Built-in stopwatch timer
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Built-in watchdog timer
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I/O port .................................................. 12 bits
(Combine serial I/O ports clock: changed through software)
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Serial I/O port ........................................ 1 port (Clock synchronous/8 bits)
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LCD driver ............................................. Either 32 segments
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1, 2, 3 or 4 commons
(Selected through software)
Regulated voltage circuit and booster voltage circuit built-in
(Correspond to 3.0V to 4.5V LCD: VR adjustment)
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Timer ..................................................... Time base counter
2ch.
Programmable timer/event counter (8 bits) 1ch.
SEIKO EPSON CORPORATION
1
SEIKO [ SEIKO EPSON CORPORATION ]
