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LC7930NW 参数 Datasheet PDF下载

LC7930NW图片预览
型号: LC7930NW
PDF下载: 下载PDF文件 查看货源
内容描述: LCD驱动器 [LCD Drivers]
分类和应用: 驱动器
文件页数/大小: 7 页 / 79 K
品牌: SANYO [ SANYO SEMICON DEVICE ]
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LC7930N, 7930NW  
Specifications  
Absolute Maximum Ratings at Ta = 25 ± 2°C  
Parameter  
Symbol  
Conditions  
Ratings  
–0.3 to +7.0  
–13.5 to V +0.3  
Unit  
V
V
max  
max  
DD  
Maximum supply voltage  
V
V
V
EE  
DD  
DD  
–0.3 to V +0.3  
DD  
V
Maximum input voltage  
Maximum output voltage  
V max  
I
V1, V2, V3, V4, V5, V6  
V
to V +0.3  
DD  
V
EE  
–0.3 to V +0.3  
DD  
V
V
max  
O
Output transistor OFF, Y1 to Y40  
V
to V +0.3  
DD  
V
EE  
Allowable power dissipation  
Operating temperature  
Storage temperature  
Pd max  
Topr  
100  
–20 to +75  
–55 to +125  
mW  
°C  
°C  
Tstg  
Note : Don’t soak the whole of IC into the tank filled with melted solder for soldering  
Allowable Operating Conditions at Ta = 20 to +75°C, VSS = 0 V, VEE = –4 to –6 V  
Parameter  
Supply voltage  
Symbol  
Conditions  
min  
4.5  
0.7V  
typ  
max  
5.5  
Unit  
V
V
V
V
DD  
DD  
High-level input voltage  
Low-level input voltage  
Shift frequency  
V
Note (1)  
Note (1)  
V
IH  
DD  
DD  
DD  
V
V
0.3V  
V
IL  
SS  
f
CLK  
400  
kHz  
ns  
ns  
CL  
SR  
High-level clock width  
Low-level clock width  
t
CLK , CLK  
800  
800  
CWH  
SR LA  
t
CLK  
SR  
CWL  
LDATA1, LDATA2,  
RDATA1, RDATA2  
Data setup time  
t
300  
ns  
SU  
t
CLK , CLK  
SR  
CLK , CLK  
SR  
CLK , CLK  
SR  
LDATA1, LDATA2,  
RDATA1, RDATA2  
CLK  
SR  
CLK CLK  
LA  
CLK  
500  
500  
ns  
ns  
ns  
SL  
LS  
LA  
LA  
LA  
LA  
Clock setup time  
t
SR  
Clock transition time  
Data retention time  
t
200  
ct  
t
300  
ns  
DH  
Electirical Characteristics at Ta = 20 to +75°C, VDD = +5 V ± 10%, VSS = 0 V, VEE = –4 to –6 V  
Parameter  
Symbol  
Conditions  
Vin = V  
min  
typ  
max  
5
Unit  
µA  
I
Note (1)  
Note (1)  
IH  
DD  
SS  
Input leakage current  
I
Vin = V  
–5  
–0.4  
µA  
IL  
LDATA1, LDATA2,  
RDATA1, RDATA2  
High-level output voltage  
Low-level output voltage  
Vi to Yj voltage down  
V
I
I
= –0.4 mA  
= 0.4 mA  
V
DD  
V
V
OH  
OH  
LDATA1, LDATA2,  
RDATA1, RDATA2  
V
0.4  
OL  
OL  
V
V
Y1 to Y40 Note (2)  
Y1 to Y40 Note (2)  
Ion = 100 µA, single output  
Ion = 50 µA, all outputs  
Open output pins  
1.1  
1.5  
V
V
d1  
d2  
I
V1 to V6  
V1 to V6  
10  
µA  
µA  
mA  
µA  
ns  
VH  
Vin = V  
DD  
Open output pins  
Vin = V  
Vi quiescent current  
Supply current  
I
–10  
VL  
EE  
Open output pins  
CLK = 400 kHz  
I
V
V
1.0  
10  
DD  
DD  
SR  
Open output pins  
M = 1 kHz  
I
EE  
PD  
EE  
Output propagation  
delay time  
LDATA1, LDATA2,  
RDATA1, RDATA2  
t
C
= 15 pF  
500  
L
Note (1): Applied to the pins; CLKSR, CLKLA, LDATA1, RDATA1, LDATA2, RDATA2, M, L/R1, L/R2, CH2-BP  
(2): The equivalent circuit between Vi to Yj (i = 1 to 6, j = 1 to 40)  
No.2778-2/7  
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