INSTRUCTION SET
S3C4510B
Table 3-23. The Conditional Branch Instructions (Continued)
Code
THUMB
ARM Equivalent
Action
Assembler
BLT label
BGT label
1011
1100
BLT label
BGT label
Branch if N set and V clear, or N clear and V set (less than)
Branch if Z clear, and either N set and V set or N clear and V
clear (greater than)
1101
BLE label
BLE label
Branch if Z set, or N set and V clear, or N clear and V set
(less than or equal)
NOTES:
1. While label specifies a full 9-bit two’s complement address, this must always be half-word-aligned (ie with bit 0 set to 0)
since the assembler actually places label >> 1 in field SOffset8.
2. Cond = 1110 is undefined, and should not be used.
Cond = 1111 creates the SWI instruction: see .
INSTRUCTION CYCLE TIMES
All instructions in this format have an equivalent ARM instruction as shown in Table 3-23. The instruction cycle
times for the THUMB instruction are identical to that of the equivalent ARM instruction.
Examples
CMP R0, #45
; Branch to over-if R0 > 45.
BGT over
; Note that the THUMB opcode will contain
; the number of half-words to offset.
...
...
...
...
over
; Must be half-word aligned.
3-92
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