S3C4510B
INSTRUCTION SET
OPCODE SUMMARY
The following table summarises the THUMB instruction set. For further information about a particular instruction
please refer to the sections listed in the right-most column.
Table 3-7. THUMB Instruction Set Opcodes
Mnemonic
ADC
Instruction
Lo-Register
Operand
Hi-Register
Operand
Condition
Codes Set
Add with carry
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
–
V
–
–
–
–
–
–
V
–
V
–
–
–
–
–
–
–
–
–
V
–
–
–
–
–
–
–
V
V (1)
V
V
–
ADD
AND
ASR
B
Add
AND
Arithmetic shift right
Unconditional branch
Conditional branch
Bit clear
Bxx
–
BIC
V
–
BL
Branch and link
Branch and exchange
Compare negative
Compare
BX
–
CMN
CMP
EOR
LDMIA
LDR
LDRB
LDRH
LSL
V
V
V
–
EOR
Load multiple
Load word
–
Load byte
–
Load half-word
Logical shift left
Load sign-extended byte
Load sign-extended half-word
Logical shift right
Move register
Multiply
–
V
–
LDSB
LDSH
LSR
MOV
MUL
MVN
NEG
ORR
POP
PUSH
POR
–
V
V (2)
V
V
V
V
–
Move negative register
Negate
OR
Pop registers
Push registers
Rotate right
–
V
3-65
SAMSUNG [ SAMSUNG ]
