INSTRUCTION SET
S3C4510B
THUMB INSTRUCTION SET FORMAT
The thumb instruction sets are 16-bit versions of ARM instruction sets (32-bit format). The ARM instructions are
reduced to 16-bit versions, Thumb instructions, at the cost of versatile functions of the ARM instruction sets. The
thumb instructions are decompressed to the ARM instructions by the Thumb decompressor inside the
ARM7TDMI core.
As the Thumb instructions are compressed ARM instructions, the Thumb instructions have the 16-bit format
instructions and have some restrictions. The restrictions by 16-bit format is fully notified for using the Thumb
instructions.
FORMAT SUMMARY
The THUMB instruction set formats are shown in the following figure.
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
1
2
3
0
0
0
0
0
0
0
0
1
Op
Offset5
Rs
Rs
Rd
Rd
Move Shifted register
Add/subtract
1
1
I
Op Rn/offset3
Rd
Op
Offset8
Move/compare/add/
subtract immediate
4
5
0
0
1
1
0
0
0
0
0
0
0
1
Op
Rs
Rd
ALU operations
Op
Rd
H1 H2
Rs/Hs
Rd/Hd
Hi regiter operations
/branch exchange
PC-relative load
6
7
0
0
1
1
0
0
0
1
1
L
Word8
Rb
B
S
0
Ro
Ro
Rd
Rd
Rd
Rd
Load/store with register
offset
8
9
0
0
1
1
0
1
1
H
L
1
Rb
Rb
Load/store sign-extended
byte/halfword
B
Offset5
Offset5
Load/store with immediate
offset
10
11
12
13
14
15
16
17
18
19
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
0
0
1
1
1
0
0
0
1
1
0
1
0
1
1
0
1
1
0
1
L
L
Rb
Load/store halfword
SP-relative load/store
Load address
Rd
Rd
0
Word8
Word8
SP
0
0
1
0
S
SWord7
Rlist
Add offset to stack pointer
Push/pop register
L
0
R
L
Rb
Rlist
Multiple load/store
Conditional branch
Software interrupt
Cond
Softset8
Value8
1
0
1
1
1
Offset11
Offset
Unconditional branch
Long branch with link
H
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Figure 3-29. THUMB Instruction Set Formats
3-64