256M GDDR3 SDRAM
K4J55323QG
TRUTH TABLE - Clock Enable (CKE)
CKEn-1
CKEn
CURRENT STATE
Power-Down
Self Refresh
COMMANDn
X
ACTIONn
Maintain Power-Down
Maintain Self Refresh
Exit Power-Down
NOTES
L
L
X
Power-Down
Self Refresh
All Banks Idle
Bank(s) Active
All Banks Idle
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
AUTO REFRESH
L
H
L
Exit Self Refresh
5
Precharge Power-Down Entry
Active Power-Down Entry
Self Refresh Entry
H
Note :
1. CKEn is the logic state of CKE at clock edge n; CKEn-1was the state of CKE at the previous clock edge.
2. Current state is the state of the GDDR3(x32) immediately prior to clock edge n.
3. COMMANDn is the command registered at clock edge n, and ACTIONn is a result of COMMANDn
4. All state and sequence not shown are illegal or reserved.
TRUTH TABLE - CURRENT STATE BANK n - COMMAND TO BANK n
CURRENT STATE
/CS /RAS /CAS /WE
COMMAND/ ACTION
DESELECT (NOP/ continue previous operation)
NO OPERATION (NOP/continue previous operation)
DATA TERMINATOR DISABLE
NOTES
H
L
X
L
L
L
L
L
L
L
L
L
L
L
L
X
H
H
L
X
H
L
X
H
H
H
H
L
Any
H
L
ACTIVE (Select and activate row)
AUTO REFRESH
Idle
L
7
7
10
10
8
10
10, 12
8
10, 11
10
8, 11
L
L
LOAD MODE REGISTER
H
H
L
H
H
L
H
H
L
L
L
H
L
L
H
L
L
H
L
L
H
L
L
H
L
L
READ (Select column and start READ burst)
WRITE (Select Column and start WRITE burst)
PRECHARGE (Deactivate row in bank or banks)
READ (Select column and start new READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE (Only after the READ burst is complete)
READ (Select column and start READ burst)
WRITE (Select column and start new WRITE burst)
PRECHARGE (Only after the WRITE burst is complete)
Row Active
Read
(Auto-Precharge
Disable)
Write
(Auto-Precharge
Disabled)
H
Note :
1. This table applies when CKE was HIGH and CKE is HIGH (see CKE Truth Table) and after t has been met
n-1
n
XSNR
(if the previous state was self refresh).
2. This table is bank-specific, except where noted (i.e., the current state is for a specific bank and the commands shown are those allowed to be issued
to that bank when in that state). Exceptions are covered in the notes below.
3. Current state definitions :
Idle : The bank has been precharged, and t has been met.
RP
Row Active : A row in the bank has been activated, and t
has been met.
RCD
No data bursts/accesses and no register accesses are in progress.
Read : A READ burst has been initiated, with auto precharge disabled.
Write : A WRITE burst has been initiated, with auto precharge disabled.
4. The following states must not be interrupted by a command issued to the same bank. COMMAND INHIBIT or NOP commands, or allowable com-
mands to the other bank should be issued on any clock edge occurring during these states. Allowable commands to the other bank are determined by
its current state and truth table- current state bank n -command to bank n. and according to truth table - current state bank n -command to bank m.
Precharging : Starts with registration of a PRECHARGE command and ends when t is met.
RP
Once t is met, the bank will be in the idle state.
RP
Row Activating : Starts with registration of an ACTIVE command and ends when t
is met.
RCD
Once t
is met, the bank will be in the :row active" state.
RCD
42 of 53
Rev. 1.1 November 2005