AFE FOR CCD/CIS SIGNAL PROCESSOR
BL8531H
FEEDBACK REQUEST
It should be quite helpful to our AFE core development if you specify your system requirements on AFE in the
following characteristic checking table and fill out the additional questions.
We appreciate your interest in our products. Thank you very much.
Characteristics
Resolution
Symbol
Min
Typ
Max
Unit
Bits
dB
Comment
Signal-to-Noise & Distortion Ratio
Conversion Rate
SNDR
3-Channel with CDS
1-Channel with CDS
MSPS
MSPS
Differential Nonlinearity
Integral Nonlinearity
Unipolar Offset Error
Gain Error
DNL
INL
LSB
LSB
%FSR
%FSR
Vp-p
Anlog Input
Full-Scale Input
Power Supply
Analog Voltage
Digital Voltage
VDDA
VDDD
V
V
Power Consumption
Temperature Range
mW
°C
¾
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What do you want to choose as power supply voltages? For example, the analog VDD needs to be 5V. The
digital VDD can be 3.3V/5V.
Which modes of AFE do you use for overall system ? (Refer to page 9)
For example: 3channel operation with CDS / 3channel SHI(CIS) operation
1channel operation with CDS / 1channel SHI(CIS) operation
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¾
¾
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Would you define the gain range and input offset range ?
Could you explain external/internal pin configurations as required?
Should the bus interface be compatible with TTL ?
When STRTLN is low, the internal circuit is reset on the rising edge of ADCCLK.
Which channel is multiplexer switched to on the next rising edge of ADCCLK, after STRTLN goes high?
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If possible, present other requirements below.
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