BL8531H
AFE FOR CCD/CIS SIGNAL PROCESSOR
USER GUIDE
CONFIGURATION
It is necessary that output signal of analog front end be shading-compensated by back end logic block including
subtracter and multiplier.
Shading-Compensation Block
Memory
Subtracter
Multiplier
CCD/CIS
AFE
Controller
Output Bus Controls
CSB
WRB
RDB
OEB
0
0
1
1
0
0
0
1
x
1
x
x
0
1
x
1
x
1
0
x
0
X
x
1
Z
1
Z
DOUT
MPU Input
MPU Output
ADC Output
x: Don't Care X: Unknown (Not recommended)
Z: High Impedance
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