Gre
r
Pro
STS3401A
Ver 1.0
S a mHop Microelectronics C orp.
P-Channel Enhancement Mode Field Effect Transistor
PRODUCT SUMMARY
V
DSS
-30V
I
D
-3.2A
R
DS(ON)
(m
Ω
) Max
79
@
VGS=-10V
127
@
VGS=-4.5V
FEATURES
Super high dense cell design for low R
DS(ON)
.
Rugged and reliable.
Suface Mount Package.
S OT -23
D
S
G
G
D
S
ABSOLUTE MAXIMUM RATINGS (
T
A
=25
°
C unless otherwise noted
)
Symbol
V
DS
V
GS
I
D
I
DM
P
D
T
J,
T
STG
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current-Continuous
-Pulsed
b
a
Limit
-30
±20
T
A
=25°C
T
A
=70°C
T
A
=25°C
T
A
=70°C
-3.2
-2.6
-12
a
Units
V
V
A
A
A
W
W
°C
Maximum Power Dissipation
1.25
0.8
-55 to 150
Operating Junction and Storage
Temperature Range
THERMAL CHARACTERISTICS
R
JA
Thermal Resistance, Junction-to-Ambient
a
100
°C/W
Details are subject to change without notice.
Jun,29,2011
1
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