LM393DR/PWR/DGKR,LM2903DR/PWR/DGKR/VQDR/VQPWR
LM339DR/PWR,LM2901DR/PWR/VQDR/VQPWR
●Circuit
Diagram
Technical Note
Vcc
OUT
IN+
IN-
GND
Fig.87 Circuit Diagram (each Comparator)
●Measurement
circuit 1 NULL Method measurement condition
Parameter
Input Offset Voltage
Input Offset Current
Input Bias Current
Large Signal
Voltage Gain
VF
VF1
VF2
VF3
VF4
VF5
VF6
S1
ON
S2
ON
S3
LM393/LM339 family
Vcc
GND
0
0
0
0
0
0
EK
-1.4
-1.4
-1.4
-1.4
-1.4
-11.4
VICR
0
0
0
0
0
0
Vcc,GND,EK,VICR Unit：[V�½
LM2903/LM2901 family
Calculation
Vcc GND EK VICR
5 to 30
5
5
5
15
15
0
0
0
0
0
0
-1.4
-1.4
-1.4
-1.4
-1.4
-11.4
0
0
0
0
0
0
1
2
3
4
ON 5 to 30
ON
ON
ON
5
5
5
15
15
OFF OFF
OFF
ON
ON
ON
OFF
ON
－
Calculation
－
1.Input offset voltage (VIO)
Vio
�½
VF1
1+ Rf /Rs
[V]
S1
Rf
50[kΩ]
RK
500[kΩ]
0.1[μF]
+15[V ]
Ri
＝
10[kΩ]
Ri
＝
10[kΩ]
RS
＝
50[Ω]
DUT
S3
RK
500[kΩ]
NULL
1000[pF]
0.1[μF]
2.Input offset current (IIO)
Iio
�½
VF2 - VF1
Ri (1+ R f / Rs)
[A]
V ICR
RS
＝
50[Ω]
Vcc
EK
3.Input bias current (IIb)
Ib
�½
VF4 - VF3
2× R i (1+ Rf / Rs)
[A]
50[kΩ]
S2
GND
RL
V RL
-15[V ]
V
VF
4.Large signal differential voltage gain (AVD)
AV
�½
20× Log
10× (1+ Rf /Rs)
VF6 - VF5
[dB]
Fig.88 Measurement Circuit1 (each Comparator)
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12/17
2011.06 - Rev.B
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