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BR24G256-3E2 参数 Datasheet PDF下载

BR24G256-3E2图片预览
型号: BR24G256-3E2
PDF下载: 下载PDF文件 查看货源
内容描述: 串行EEPROM系列标准EEPROM [Serial EEPROM Series Standard EEPROM]
分类和应用: 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 33 页 / 490 K
品牌: ROHM [ ROHM ]
 浏览型号BR24G256-3E2的Datasheet PDF文件第10页浏览型号BR24G256-3E2的Datasheet PDF文件第11页浏览型号BR24G256-3E2的Datasheet PDF文件第12页浏览型号BR24G256-3E2的Datasheet PDF文件第13页浏览型号BR24G256-3E2的Datasheet PDF文件第15页浏览型号BR24G256-3E2的Datasheet PDF文件第16页浏览型号BR24G256-3E2的Datasheet PDF文件第17页浏览型号BR24G256-3E2的Datasheet PDF文件第18页  
Datasheet  
BR24G256-3  
Write Command  
1. Write Cycle  
(1) Arbitrary data can be written to EEPROM. When writing only 1 byte, Byte Write is normally used, and when  
writing continuous data of 2 bytes or more, simultaneous write is possible by Page Write cycle. The maximum  
number of write bytes is specified per device of each capacity. Up to 64 arbitrary bytes can be written.  
S
T
A
R
T
W
R
I
T
E
S
T
O
P
SLAVE  
ADDRESS  
1st WORD  
ADDRESS  
2nd WORD  
ADDRESS  
DATA  
SDA  
LINE  
WA WA WAWA  
14 13 12 11  
WA  
0
1
0
1
0 A2A1A0  
D7  
D0  
* Don't Care bit  
*
A
C
K
A
C
K
A
C
K
R
/
W
A
C
K
Figure 35. Byte Write Cycle  
S
T
A
R
T
W
R
I
T
E
S
T
O
P
SLAVE  
ADDRESS  
1st WORD  
ADDRESS(n)  
2nd WORD  
ADDRESS(n)  
DATA(n)  
DATA(n+63)  
SDA  
LINE  
WA WA WA WA  
14 13 12 11  
WA  
0
1
0
1
A2 A1A0  
D7  
D0  
D0  
0
*
* Don't Care Bit  
A
C
K
R
/
W
A
C
K
A
C
K
A
C
K
A
C
K
Figure 36. Page Write Cycle  
(2) During internal write execution, all input commands are ignored, therefore ACK is not returned.  
(3) Data is written to the address designated by word address (n-th address)  
(4) By issuing stop bit after 8bit data input, internal write to memory cell starts.  
(5) When internal write is started, command is not accepted for tWR (5ms at maximum).  
(6) Using page write cycle, writing in bulk is done as follows: When data of more than 64 bytes is sent, the bytes in  
excess overwrite the data already sent first.  
(Refer to "Internal Address Increment")  
(7) As for page write cycle of BR24G256-3, where 2 or more bytes of data is intended to be written, after the 9  
significant bits of word address are designated arbitrarily, only the value of 6 least significant bits in the address  
is incremented internally, so that data up to 64 bytes of memory only can be written.  
In the case BR24G256-3, 1 page=64bytes, but the page  
write cycle time is 5ms at maximum for 64byte bulk write.  
It does not stand 5ms at maximum × 64byte=320ms (Max)  
2. Internal Address Increment  
Page write mode (in the case of BR24G256-3)  
WA7 WA6 WA5 WA4 WA3 WA2 WA1 WA0  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
Increment  
For example, when it is started from address 3Eh,  
then, increment is made as below,  
3Eh3Fh00h01h・・・ please take note.  
0
0
0
0
0
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
0
1
0
3Eh  
3Eh・・・3E in hexadecimal, therefore,  
00111110 becomes a binary number.  
Significant bit is fixed.  
No digit up  
3. Write Protect (WP) Terminal  
Write Protect (WP) Function  
When WP terminal is set at Vcc (H level), data rewrite of all addresses is prohibited. When it is set GND (L level),  
data rewrite of all address is enabled. Be sure to connect this terminal to Vcc or GND, or control it to H level or L  
level. Do not leave it open.  
In case of using it as ROM, it is recommended to connect it to pull up or Vcc.  
At extremely low voltage at power ON/OFF, by setting the WP terminal ‘H’, write error can be prevented.  
www.rohm.com  
TSZ02201-0R2R0G100240-1-2  
25.Feb.2013 Rev.002  
©2013 ROHM Co., Ltd. All rights reserved.  
14/30  
TSZ2211115001  
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