DS2154
3 PARALLEL PORT
The DS2154 is controlled via either a nonmultiplexed (MUX = 0) or a multiplexed (MUX = 1) bus by an
external microcontroller or microprocessor. The DS2154 can operate with either Intel or Motorola bus
timing configurations. If the BTS pin is tied low, Intel timing will be selected; if tied high, Motorola
timing will be selected. All Motorola bus signals are listed in parentheses. See the timing diagrams in the
AC Electrical Characteristics in Section 16 for more details.
4 CONTROL, ID, AND TEST REGISTERS
The operation of the DS2154 is configured via a set of nine control registers. Typically, the control
registers are only accessed when the system is first powered up. Once the DS2154 has been initialized,
the control registers will only need to be accessed when there is a change in the system configuration.
There are two Receive Control Registers (RCR1 and RCR2), two Transmit Control Registers (TCR1 and
TCR2), and five Common Control Registers (CCR1 to CCR5). Each of the nine registers is described in
this section.
There is a device Identification Register (IDR) at address 0Fh. The MSB of this read-only register is fixed
to a 1 indicating that the DS2154 is present. The pin-for-pin compatible T1 version of the DS2154 is the
DS2152, which also has an ID register at address 0Fh. The user can read the MSB to determine which
chip is present because the MSB is set to 1 in the DS2154, and is set to 0 in the DS2152. The lower 4 bits
of the IDR are used to display the die revision of the chip.
The Test Registers at addresses 15, 19, and AC hex are used by the factory in testing the DS2154. On
power-up, the Test Registers should be set to 00 hex for the DS2154 to operate properly.
IDR: DEVICE IDENTIFICATION REGISTER (Address = 0F Hex)
(MSB)
(LSB)
T1E1
0
0
POSITION
IDR.7
0
ID3
ID2
ID1
ID0
SYMBOL
NAME AND DESCRIPTION
T1E1
T1 or E1 Chip Determination Bit.
0 = T1 chip
1 = E1 chip
ID3
IDR.3
Chip Revision Bit 3. MSB of a decimal code that represents the
chip revision.
ID2
ID1
ID0
IDR.1
IDR.2
IDR.0
Chip Revision Bit 2.
Chip Revision Bit 1.
Chip Revision Bit 0. LSB of a decimal code that represents the
chip revision.
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ROCHESTER [ Rochester Electronics ]
