RT8859M
Function Block Diagram
Current
Monitor
Offset
Generator
Current
Monitor
IMON
MUX
ADC
UVLO
GND
V
SETA
V
SET
From Control Logic
DAC
Control &
Protection Logic
RGNDA
QRSET
SVID XCVR
QRSETA
Soft-Start & Slew
Rate Control
ERROR
AMP
V
SETA
PWM
CMP
+
-
TON
Gen
+
-
PWMA
FBA
COMPA
Offset
Cancellation
TONSETA
Set VIDA
Fast & Slow
Set VID
Fast & Slow
DVIDA
DVID
1/20
To Protection Logic
OVP/UVP/NVP
1/20
ISENAP
ISENAN
+
20
-
OCP
From Control Logic
Offset
OCSETA
OFS
Generator
DAC
RGND
PWM
CMP
Soft-Start & Slew
Rate Control
V
SET
TONSET
PWM1
+
+
FB
-
Offset
Cancellation
-
TON
Gen
PWM2
COMP
QR
CMP
PWM3
PWM4
+
+
PHASE
Selector
-
V
QR_TRIP
IBIAS
RSET
ISEN4P
ISEN4N
+
10
-
To Protection Logic
OVP/UVP/NVP OCP
Current Balance
SUM
ISEN3P
ISEN3N
+
10
-
ISEN2P
ISEN2N
+
10
-
ISEN1P
ISEN1N
+
10
-
OCSET
Copyright 2012 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
8
DS8859M-05 July 2012
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
