RT7297C
Layout Consideration
SW node is with high frequency voltage swing and
should be kept at small area. Keep analog components
away from the SW node to prevent stray capacitive noise
pick-up.
Follow the PCB layout guidelines for optimal performance
of the RT7297C.
Keep the traces of the main current paths as short and
Connect feedback network behind the output capacitors.
Keep the loop area small. Place the feedback
components near the RT7297C.
wide as possible.
Put the input capacitor as close as possible to the device
pins (VINandGND).
An example of PCB layout guide is shown in Figure 9
for reference.
SW
C
V
V
GND
GND
IN
IN
The feedback components
must be connected as close
to the device as possible.
R
BOOT
EN
C
SS
Input capacitor must
be placed as close
to the IC as possible.
C
IN
C
C
8
7
6
5
BOOT
VIN
SS
2
3
4
R
C
EN
C
P
L
GND
V
OUT
SW
COMP
FB
9
R1
GND
R2
V
OUT
C
OUT
GND
SW node is with high frequency voltage swing and should
be kept at small area. Keep analog components away from
the SW node to prevent stray capacitive noise pick-up
Figure 9. PCB Layout Guide
Table 3. Suggested Capacitors for CIN and COUT
Location
Component Supplier
MURATA
TDK
Part No.
Capacitance (F)
Case Size
1206
C
C
C
GRM31CR61E106K
C3225X5R1E106K
TMK316BJ106ML
GRM31CR60J476M
C3225X5R0J476M
GRM32ER71C226M
C3225X5R1C22M
10
10
10
47
47
22
22
IN
IN
IN
1206
TAIYO YUDEN
MURATA
TDK
1206
C
C
C
C
1206
OUT
OUT
OUT
OUT
1210
MURATA
TDK
1210
1210
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14
DS7297C-02 April 2014
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
