RT2560Q
Application Information
Capacitor Selection
Like any low dropout linear regulator, the RT2560Q's
external input and output capacitors must be properly
selected for stability and performance. Use a 1μF or larger
input capacitor and place it close to the IC's VCC and
GND pins. Any output capacitor met the minimum 1mΩ
ESR (Equivalent Series Resistance) and effective
capacitance larger than 1μF requirement may be used.
Place the output capacitor close to the IC's VOUT and
GND pins. Increasing capacitance and decreasing ESR
can improve the circuit's PSRR and line transient response.
Over-Temperature Protection
Thermal protection limits power dissipation to prevent IC
overheat. When the operation junction temperature
exceeds 150°C, the over-temperature protection circuit
starts the thermal shutdown function and turns the
regulator off. The regulator turns on again after the junction
temperature cools down by 20°C.
Power Dissipation
For continuous operation, do not exceed absolute
maximum operation junction temperature 125°C. The
power dissipation definition in device is :
P
D
= (V
IN
−
V
OUT
) x I
OUT
+ V
IN
x I
Q
The maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
surroundings airflow and temperature difference between
junctions to ambient. The maximum power dissipation can
be calculated by following formula :
P
D(MAX)
= (T
J(MAX)
−
T
A
) /
θ
JA
Where T
J(MAX)
is the maximum operation junction
temperature, T
A
is the ambient temperature and the
θ
JA
is
the junction to ambient thermal resistance.
For recommended operating conditions specification, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance for SOP-8 (Exposed Pad)
package is 75°C/W on the standard JEDEC 51-7 (4 layers,
2S2P) thermal test board. The copper thickness is 2oz.
(a) Copper Area = (2.3 x 2.3) mm
2
,
θ
JA
= 75°C/W
The maximum power dissipation at T
A
= 25°C can be
calculated by following formula :
P
D(MAX)
= (125°C
−
25°C) / (75°C/W) = 1.33W
(SOP-8 Exposed Pad on the minimum layout)
P
D(MAX)
= (125°C
−
25°C) / (49°C/W) = 2.04W
(SOP-8 Exposed Pad on the 70mm
2
copper area layout)
Layout Considerations
The thermal resistance
θ
JA
of SOP-8 (Exposed Pad) is
determined by the package design and the PCB design.
However, the package design had been designed. If
possible, it's useful to increase thermal performance by
the PCB design. The thermal resistance
θ
JA
can be
decreased by adding a copper under the exposed pad of
SOP-8 (Exposed Pad) package.
As shown in Figure 1, the amount of copper area to which
the SOP-8 (Exposed Pad) is mounted affects thermal
performance. When mounted to the standard SOP-8
(Exposed Pad) pad (Figure 1.a),
θ
JA
is 75°C/W. Adding
copper area of pad under the SOP-8 (Exposed Pad) (Figure
1.b) reduces the
θ
JA
to 64°C/W. Even further, increasing
the copper area of pad to 70mm
2
(Figure 1.e) reduces the
θ
JA
to 49°C/W.
(b) Copper Area = 10mm
2
,
θ
JA
= 64°C/W
Copyright
©
2016 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
8
DS2560Q-01 February 2016
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
