Proposed
RF2722
At power up the SDI address 011111 should be written to set up the default reset states of all registers. Note that programmed
settings will be lost if power to the part is removed.
The figure below shows a timing diagram for the serial interface. The slave select (SS) pin is normally high. A serial transfer is
initiated by taking SS low. The address and data bits on the serial data in (SDI) pin are shifted in on rising edges of the serial
clock (SCLK) pin. Twelve data bits follow the four address bits. The data is latched and changes take effect on the rising edge
of SS. Refer to the Electrical Specifications for the timing requirements.
Tcs
Tcwh
Tcwl
Tcs
...
...
...
MSB
LSB
Tsu
Th
Tcs
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Rev A4 DS050919
RFMD [ RF MICRO DEVICES ]
