ML5805
37
AOUT
O (analog)
Analog data output.
38
DOUT
O (CMOS)
Serial digital output after demodulation, bit rate
filtering and center data slicing. CMOS levels
with controlled slew rates.
OE
VDD
(output enable)
VDD
VSSD
VDD
DOUT
VSSD
OEH
VSSD
(high drive output enable)
39
DATASEL
I/O (CMOS)
When TCMOD= 4 or 5, this pin becomes an
input and it controls the time constant of the
data slicer.
VDD
OE
(input enable)
VDD
When TCMOD= 4 or 5;
DATASEL= VIH selects 6uS time constant
DATASEL= VIL selects 300uS time constant
-else-
-or-
VSSD
VDD
DATASEL
When TCMODis not set to value 4 or 5, this pin
becomes the PLL Lock/Unlock output
PLL_Lock
PLL_Lock = VOH indicates PLL is locked
PLL_Lock = VOL indicates PLL is not locked
VSSD
OE
VSSD
(output enable)
MODE CONTROL AND INTERFACE LINES
1
XCEN
I (CMOS)
Transceiver Enable input. Enables the
bandgap reference and voltage regulators
when high, enabling normal control functions.
Consumes only leakage current in STANDBY
mode when low.
Operating mode = VIH
Standby mode = VIL
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PRELIMINARY DATA SHEET
APRIL 2008
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9
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