ML5805
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
tse
EN setup time to ignore next rising
15
ns
CLK
ts
th
DATA-to-CLK setup time
DATA-to-CLK hold time
15
15
ns
ns
Note 1: Serial I/O clock maximum rise and fall times are based on the minimum clock period. Longer rise and fall times
can be accommodated for slower clocks provided the rise and fall times remain less than 20% of the clock period and
all set up and hold time minimums are met with respect to the CMOS switching points (VIL MAX and VIH MIN). The
serial I/O clock rise and fall times are limited to an absolute maximum of 100ns.
PIN DESCRIPTIONS
PIN
SIGNAL
NAME
I/O
FUNCTION
DIAGRAM
POWER & GROUND
5
VSSD
GND
Digital ground for all digital I/O circuits and
control logic.
N/A
9
VDD
PWR/I
3.3VDC power supply input
N/A
N/A
10
VREG_1P8
PWR/O
1.8VDC regulator output. Place capacitor
between this pin and ground to decouple
(bypass) noise and to stabilize the regulator.
(Decouple)
11
VBG_1P8
PWR/O
1.13VDC bandgap voltage output. Place
capacitor between this pin and ground to
decouple (bypass) noise.
N/A
(Decouple)
13
17
VCCSYN
PWR/I
2.7VDC power supply input. Must be
connected to VREGPLL pin externally.
N/A
N/A
VREGVCO
PWR/O
2.5VDC regulator output. Place capacitor
between this pin and ground to decouple
(bypass) noise and to stabilize the regulator.
(Decouple)
18
19
20
21
24
VREGPLL
VCCPLL
PWR/O
2.7VDC power supply output. Place capacitor
between this pin and ground to decouple
(bypass) noise and to stabilize the regulator.
N/A
N/A
N/A
N/A
N/A
(Decouple)
PWR/I
3.3VDC power supply input. Place capacitor
between this pin and ground to decouple
(bypass) noise.
(Decouple)
VBG_VCO
VREGLNA
VREGRX
PWR/O
1.13VDC bandgap voltage output. Place
capacitor between this pin and ground to
decouple (bypass) noise
(Decouple)
PWR/O
2.7VDC regulator output. Place capacitor
between this pin and ground to decouple
(bypass) noise and to stabilize the regulator.
(Decouple)
PWR/O
2.7VDC regulator output. Place capacitor
between this pin and ground to decouple
(bypass) noise and to stabilize the regulator.
(Decouple)
25
26
VBG_RF
VREGTX
PWR/O
Bandgap 1.24V decouple voltage. Decoupled
to ground with a capacitor.
N/A
N/A
(Decouple)
PWR/I
2.7VDC power supply input. Must be
connected to VREGRX pin externally.
(Decouple)
RF MICRO DEVICES®, RFMD®, OPTIMUM TECHNOLOGY MATCHING®, ENABLING WIRELESS CONNECTIVITY™, POWERSTAR®, POLARIS™ TOTAL RADIO™ ULTIMATEBLUE™ AND FASTWAVE™ ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY
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PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 · FOR SALES OR TECHNICAL
REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
6
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