T
R
C
1
0
4
A p p l i c a t i o n C i r c u i t
X
X
X
2
3
2
4
2
0
1
0
1
1
1
1
7
5
4
3
P
M
O
D
E
+
3
V
V
C
C
R
F
1
2
2
p
F
M
O
D
E
4
2
C
S
R
F
-
1
.
0
p
F
S
C
L
K
H
o s t
i c r o c o n t r o l l e r
3
.
9
n
H
3
M
S
D
A
T
R
F
+
2
2
1
2
T
R
C
1
0
4
I
N
T
1
.
0
p
F
5
.
6
n
H
R
R
S
S
S
S
I
I
D
A
V
D
D
R
F
1
9
2
2
n
F
2
2
p
F
0
.
1
µ
F
1
2
5
V
C
C
V
C
O
+
3
V
V
C
C
D
+
3
V
2
2
p
F
2
2
p
F
1
1
6
8
9
1
8
1
6
P
7
1
M
1
.
0
µ
F
1
6
M
H
z
2
2
p
F
2
2
p
F
Figure 3
For Burst Transmit Mode, the TRC104 RF output ramp-up and ramp-down times are configurable, controlling
excessive transmitter bandwidth due to fast rise and fall times of the transmitter RF envelope. After the PLL is
locked for transmission, the power amplifier is ramped up stage by stage beginning with the lowest power level
until the power level that is specified by the PWR bits in register 0x01 is reached. Once the transmission is
complete, the power amplifier is ramped down stage-by-stage until it is completely disabled.
The ramp-up/ramp-down function increases or decreases the output power stage-by-stage as specified by the
PA_RU and PA_RD bits of register 0x07, respectively. Figure 4 shows the timing for the ramp-up/ramp-down.
P
o
w
e
r
A
m
p
l
i
f
i
e
r
R
a
m
p
U
p
/
D
o
w
n
T
i
m
i
n
g
M
O
D
E
-
5
d
B
R
F
P
o
w
e
r
-
1
0
d
B
-
2
0
d
B
O
F
F
D
a
t
a
R
F
D
a
t
a
T
r
a
n
s
m
i
s
s
i
o
n
O
N
R
U
R
U
R
U
R
U
A
N
R
D
R
D
R
D
O
R
R
A
N
:
R
F
P
o
w
e
r
A
m
a
a
p
l
p
p
i
f
i
e
r
O
n
I n t e r v a l
n I n t e r v a l
U
D
:
:
R
R
F
F
P
P
o
o
w
w
e
e
r
r
R
R
m
m
U
D
p
o
w
N
:
A
n
a
l
o
g
C
i
r
c
u
i
t
r
y
O
N
Figure 4
www.RFM.com E-mail: info@rfm.com
©2009 by RF Monolithics, Inc.
Technical support +1.800.704.6079
Page 9 of 33
TRC104 - 08/13/09
RFM [ RF MONOLITHICS, INC ]
