RX62N Group, RX621 Group
4. I/O Registers
Table 4.1
List of I/O Registers (Address Order) (14 / 35)
Module
Register
Number Access
Number of
Address
Abbreviation Register Name
Abbreviation of Bits
Size
16
8
Access Cycles
0008 801Ch
0008 8028h
0008 8028h
0008 8029h
0008 802Ah
0008 802Bh
CMT3
WDT
WDT
WDT
WDT
WDT
Compare match timer constant register
CMCOR
16
8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
Timer control/status register
Write window A register
Timer counter
READ.TCSR
WRITE.WINA 16
READ.TCNT
WRITE.WINB 16
16
8
8
Write window B register
Reset control/status register
16
8
READ.RSTC
SR
8
0008 8030h
0008 8032h
0008 8034h
0008 8040h
0008 8042h
0008 8044h
0008 8046h
0008 8050h
0008 8051h
0008 8052h
0008 8053h
0008 805Fh
0008 8060h
0008 8062h
0008 8064h
0008 8066h
0008 8070h
0008 8071h
0008 8072h
0008 8073h
0008 807Fh
0008 80C0h
0008 80C2h
0008 80C4h
0008 80C5h
0008 81E6h
0008 81E7h
0008 81E8h
0008 81E9h
0008 81EAh
0008 81EBh
IWDT
IWDT
IWDT
AD0
AD0
AD0
AD0
AD0
AD0
AD0
AD0
AD0
AD1
AD1
AD1
AD1
AD1
AD1
AD1
AD1
AD1
DA
IWDT refresh register
IWDT control register
IWDT status register
IWDTRR
IWDTCR
IWDTSR
ADDRA
ADDRB
ADDRC
ADDRD
ADCSR
ADCR
8
8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
2 to 3 PCLK*8
16
16
16
16
16
16
8
16
16
16
16
16
16
8
A/D data register A
A/D data register B
A/D data register C
A/D data register D
A/D control/status register
A/D control register
8
8
ADDRn format select register
A/D sampling state register
A/D self-diagnostic register
A/D data register A
ADDPR
ADSSTR
ADDIAGR
ADDRA
ADDRB
ADDRC
ADDRD
ADCSR
ADCR
8
8
8
8
8
8
16
16
16
16
8
16
16
16
16
8
A/D data register B
A/D data register C
A/D data register D
A/D control/status register
A/D control register
8
8
ADDRn format select register
A/D sampling state register
A/D self-diagnostic register
D/A data register 0
ADDPR
ADSSTR
ADDIAGR
DADR0
DADR1
DACR
8
8
8
8
8
8
16
16
8
16
16
8
DA
D/A data register 1
DA
D/A control register
DA
DADRm format select register
PPG output control register
PPG output mode register
Next data enable register H
Next data enable register L
Output data register H
Output data register L
Next data register H
DADPR
PCR
8
8
PPG0
PPG0
PPG0
PPG0
PPG0
PPG0
8
8
PMR
8
8
NDERH
NDERL
PODRH
PODRL
NDRH
8
8
8
8
8
8
8
8
0008 81ECh*1 PPG0
0008 81EDh*2 PPG0
0008 81EEh*1 PPG0
0008 81EFh*2 PPG0
8
8
Next data register L
NDRL
8
8
Next data register H2
Next data register L2
PPG trigger select register
PPG output control register
PPG output mode register
NDRH2
NDRL2
PTRSLR
PCR
8
8
8
8
0008 81F0h
0008 81F6h
0008 81F7h
PPG1
PPG1
PPG1
8
8
8
8
PMR
8
8
R01DS0052EJ0110 Rev.1.10
Feb 10, 2011
Page 65 of 146
RENESAS [ RENESAS TECHNOLOGY CORP ]
