Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
12. Interrupts
12.3.10 Interrupt Priority Level Selection Circuit
The interrupt priority level selection circuit is used to select the highest priority interrupt.
Level 0 (initial value)
Priority level of interrupts
Voltage monitor 1 / comparator A1
Priority level of interrupts
Highest
Timer RC
UART2 bus collision detection
INT5
UART1 reception
INT7
Voltage monitor 2 / comparator A2
UART0 reception
Timer RG
A/D conversion
INT2
UART2 reception/ACK2
INT3
Timer RE
Timer RB
Timer RD0
Timer RA
UART1 transmission
INT6
UART0 transmission
INT0
SSU / I
2
C bus
(1)
INT1
Key input
INT4
UART2 transmission/
NACK2
Flash memory ready
Timer RD1
IPL
Lowest
Interrupt request level
select output signal
Interrupt request
acknowledgement
Peripheral function interrupt priority
(if priority levels are same)
I flag
Address match
Watchdog timer
Oscillation stop detection
Voltage monitor 1 / comparator A1
Voltage monitor 2 / comparator A2
Note:
1. Selectable by the IICSEL bit in the SSUIICSR register.
Figure 12.8
Interrupt Priority Level Selection Circuit
REJ09B0441-0010 Rev.0.10
Page 183 of 809
Jul 30, 2008
RENESAS [ RENESAS TECHNOLOGY CORP ]
