Preliminary document
Specifications in this document are tentative and subject to change.
Under development
R8C/34W Group, R8C/34X Group, R8C/34Y Group, R8C/34Z Group
5. Electrical Characteristics
(2)
Table 5.10
Power-on Reset Circuit, Voltage Monitor 0 Reset Electrical Characteristics
Standard
Symbol
Parameter
Condition
Unit
Min.
0
Typ.
Max.
(1)
trth
External power VCC rise gradient
−
50000 mV/msec
Notes:
1. The measurement condition is VCC = 2.7 V to 5.5 V and Topr = −40 to 85°C (J version) / −40 to 125°C (K version).
2. To use the power-on reset function, enable voltage monitor 0 reset by setting the LVDAS bit in the OFS register to 0.
(1)
Vdet0
(1)
Vdet0
trth
trth
External
Power VCC
0.5 V
(2)
Voltage detection 0
circuit response time
tw(por)
Internal
reset signal
1
1
× 32
× 32
fOCO-S
fOCO-S
Notes:
1. Vdet0 indicates the voltage detection level of the voltage detection 0 circuit. Refer to 6. Voltage Detection
Circuit of User’s Manual: Hardware (REJ09B0605) for details.
2. tw(por) indicates the duration the external power VCC must be held below the valid voltage (0.5 V) to enable a
power-on reset. When turning on the power after it falls with voltage monitor 0 reset disabled, maintain tw(por)
for 1 ms or more.
Figure 5.3
Power-on Reset Circuit Electrical Characteristics
REJ03B0312-0010 Rev.0.10
Apr 09, 2010
Page 51 of 67