R8C/13 Group
12.1 Timer (Timer X)
12.1.3 Event Counter Mode
In this mode, the timer counts an external signal fed to INT1/CNTR0 pin (See “Table 12.4 Event
Counter Mode Specifications”). Figure 12.6 shows TXMR register in event counter mode.
Table 12.4 Event Counter Mode Specifications
Item
Count source
Count operation
Specification
External signals fed to CNTR0 pin (Active edge is selected by program)
• Down count
• When the timer underflows, the contents in the reload register is reloaded and the count
is contiuned.
Divide ratio
1/(n+1)(m+1)
n: set value of PREX register, m: set value of TX register
Count start condition
Count stop condition
Interrupt request
Write “1” (count start) to TXS bit in TXMR register
Write “0” (count stop) to TXS bit in TXMR register
• When Timer X underflows [Timer X interrupt]
generation timing
INT1/CNTR0 pin function
CNTR0 pin function
Read from timer
_______
Count source input (INT1 interrupt input)
Programmable I/O port
Count value can be read by reading TX register
Same applies to PREX register.
Write to timer
Value written to TX register is written to both reload register and counter.
Same applies to PREX register.
Select function
• INT1/CNTR0 polarity switching function
Active edge of count source can be selected with R0EDG.
Timer X mode register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
TXMR
Address
008B16
After reset
0016
1
0
0 0 0 0
RW
RW
Bit symbol
TXMOD0
Function
Bit name
b1 b0
Operation mode
select bit 0, 1
1 0 : Event counter mode
TXMOD1
R0EDG
RW
RW
RW
RW
RW
RW
RW
INT1/CNTR0 polarity
0 : Rising edge
1 : Falling edge
switching bit(1)
Timer X count
start flag
0 : Stops counting
1 : Starts counting
TXS
TXOCNT
Set to "0" in event counter mode
TXMOD2
Set to "0" in event counter mode
Set to "0" in event counter mode
Set to "0" in event counter mode
TXEDG
TXUND
NOTES:
1. The IR bit in the INT1IC register may be set to “1” (interrupt requested) when the R0EDG bit is rewritten.
Refer to the paragraph 19.2.5 “Changing Interrupt Factor” in the Usage Notes Reference Book.
Figure 12.6 TXMR Register in Event Counter Mode
Rev.1.20 Jan 27, 2006 page 75 of 205
REJ09B0111-0120