R8C/13 Group
10.4 Address Match Interrupt
Address match interrupt enable register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
AIER
Address
000916
After reset
XXXXXX00
2
Bit symbol
AIER0
Bit name
Function
RW
Address match interrupt 0
enable bit
0 : Interrupt disabled
1 : Interrupt enabled
RW
RW
Address match interrupt 1
enable bit
AIER1
0 : Interrupt disabled
1 : Interrupt enabled
Nothing is assigned.
When write, set to “0”.
When read, their contents are indeterminate.
(b7-b2)
Address match interrupt register i (i = 0, 1)
(b19)
b3
(b16)(b15)
b0 b7
(b8)
b0 b7
(b23)
b7
Symbol
RMAD0
RMAD1
Address
001216 to 001016
001616 to 001416
After reset
X0000016
X0000016
b0
Function
Address setting register for address match interrupt
Setting range
0000016 to FFFFF16
RW
RW
Nothing is assigned. When write, set to “0”.
When read, its content is indeterminate.
(b7-b4)
Figure 10.17 AIER Register and RMAD0 to RMAD1 Registers
Rev.1.20 Jan 27, 2006 page 67 of 205
REJ09B0111-0120