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R5F21134DFP 参数 Datasheet PDF下载

R5F21134DFP图片预览
型号: R5F21134DFP
PDF下载: 下载PDF文件 查看货源
内容描述: 16位单片机M16C族/ R8C / Tiny系列 [16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY/R8C/Tiny SERIES]
分类和应用: 微控制器和处理器外围集成电路计算机时钟
文件页数/大小: 224 页 / 2076 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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R8C/13 Group  
10.3 Key Input Interrupt  
10.3 Key Input Interrupt  
_____  
_____  
A key input interrupt is generated on an input edge of any of the K10 to K13 pins. Key input interrupts can  
_____  
be used as a key-on wakeup function to exit wait or stop mode. KIi input can be enabled or disabled  
selecting with the KIiEN (i=0 to 3) bit in the KIEN register. The edge polarity can be rising edge or falling  
_____  
edge selecting with the KIiPL bit in the KIEN register. Note, however, that while input on any KIi pin which  
has had the KIiPL bit set to 0(falling edge) is pulled low, inputs on all other pins of the port are not  
_____  
detected as interrupts. Similarly, while input on any KIi pin which has had the KIiPL bit set to 1(rising  
edge) is pulled high, inputs on all other pins of the port are not detected as interrupts.  
Figure 10.15 shows a block diagram of the key input interrupt.  
PU02 bit in PUR0 register  
KUPIC register  
Pull-up  
PD1_3 bit in PD1 register  
transistor  
KI3EN bit  
PD1_3 bit  
KI3PL=0  
KI  
3
2
KI3PL=1  
KI2EN bit  
PD1_2 bit  
Pull-up  
transistor  
KI2PL=0  
KI2PL=1  
Key input interrupt  
request  
Interrupt control circuit  
KI  
KI1EN bit  
PD1_1 bit  
Pull-up  
transistor  
KI1PL=0  
KI1PL=1  
KI0EN, KI1EN, KI2EN, KI3EN,  
KI0PL, KI1PL, KI2PL, KI3PL: Bits in KIEN register  
PD1_0, PD1_1, PD1_2, PD1_3: Bits in PD1 register  
KI  
1
0
KI0EN bit  
PD1_0 bit  
Pull-up  
transistor  
KI0PL=0  
KI0PL=1  
KI  
Figure 10.15 Key Input Interrupt  
Key input enable register  
b7 b6 b5 b4 b3 b2 b1 b0  
Symbol  
KIEN  
Address  
009816  
After reset  
0016  
Bit symbol  
RW  
RW  
Bit name  
Function  
0 : Disabled  
1 : Enabled  
KI0EN  
KI0 input enable bit  
KI0PL  
KI1EN  
KI1PL  
KI2EN  
KI2PL  
KI3EN  
KI3PL  
KI0 input polarity select bit  
KI1 input enable bit  
0 : Falling edge  
1 : Rising edges  
RW  
RW  
RW  
RW  
RW  
RW  
0 : Disabled  
1 : Enabled  
KI1 input polarity select bit  
KI2 input enable bit  
0 : Falling edge  
1 : Rising edges  
0 : Disabled  
1 : Enabled  
KI2 input polarity select bit  
KI3 input enable bit  
0 : Falling edge  
1 : Rising edges  
0 : Disabled  
1 : Enabled  
KI3 input polarity select bit  
0 : Falling edge  
1 : Rising edges  
RW  
NOTES:  
1. The IR bit in the KUPIC register may be set to 1(interrupt requested) when the KIEN register is rewritten.  
Refer to the paragraph 19.2.5 Changing Interrupt Factorin the Usage Notes Reference Book.  
Figure 10.16 KIEN Register  
Rev.1.20 Jan 27, 2006 page 65 of 205  
REJ09B0111-0120  
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