R8C/13 Group
12.4 Timer (Timer C)
12.4 Timer C
Timer C is a 16-bit timer. Figure 12.28 shows a block diagram of Timer C. Figure 12.29 shows a block
diagram of CMPs waveform generation unit. Figure 12.30 shows a block diagram of CMP waveform
output unit.
The Timer C has two modes: input capture mode and output compare mode.
Figures 12.31 shows TC, TM0, TM1, and TCC0 registers. Figure 12.32 shows TCC1 and TCOUT regis-
ters.
TCC11 to TCC10
=01
=10
=11
2
2
2
f
1
8
Sampling
clock
f
f32
TCC07=0
TCC07=1
Other than 00
2
Digital
filter
INT3/TCIN
Edge
detection
INT3 interrupt
=00
2
fRING128
Transfer signal
Upper 8 bits
Lower 8 bits
Capture and compare 0 register
TM0 register
Compare circuit 0
Compare 0 interrupt
Timer C interrupt
TCC02 to TCC01
=00
=01
=10
2
2
2
f
f
1
8
Upper 8 bits
Counter
Lower 8 bits
f
32
=112
TC register
TCC12
=0
TCC12
=1
f
RING-fast
TCC00
Timer C counter reset signal
Compare circuit 1
Compare 1 interrupt
Upper 8 bits
Compare register 1
TM1 register
Lower 8 bits
TCC01 to TCC02, TCC07: Bits in TCC0 register
TCC10 to TCC12: Bits in TCC1 register
Figure 12.28 Timer C Block Diagram
Rev.1.20 Jan 27, 2006 page 101 of 205
REJ09B0111-0120
RENESAS [ RENESAS TECHNOLOGY CORP ]
