3858 Group
On-going Routine
Execute JSR
Interrupt request
(Note)
M (S) (PCH)
(S) (S) – 1
M (S) (PCL)
(S) (S) – 1
M (S) (PS)
(S) (S) – 1
Push return address
on stack
M (S) (PCH)
(S) (S) – 1
M (S) (PCL)
(S) (S)– 1
Subroutine
Push return address
on stack
Push contents of processor
status register on stack
Interrupt
Service Routine
I Flag is set from “0” to “1”
Execute RTS
(S) (S) + 1
Fetch the jump vector
Execute RTI
(S) (S) + 1
POP return
address from stack
POP contents of
processor status
register from stack
(PCL) M (S)
(S) (S) + 1
(PCH) M (S)
(PS)
M (S)
(S) (S) + 1
(PCL) M (S)
(S) (S) + 1
(PCH) M (S)
POP return
address
from stack
Note: Condition for acceptance of an interrupt
Interrupt enable flag is “1”
Interrupt disable flag is “0”
Fig. 6 Register push and pop at interrupt generation and subroutine call
Table 3 Push and pop instructions of accumulator or processor status register
Push instruction to stack
Pop instruction from stack
Accumulator
PHA
PHP
PLA
PLP
Processor status register
Rev.1.10 Apr 3, 2006 page 7 of 75
REJ03B0139-0110
RENESAS [ RENESAS TECHNOLOGY CORP ]
