欢迎访问ic37.com |
会员登录 免费注册
发布采购

M37905F8CSP 参数 Datasheet PDF下载

M37905F8CSP图片预览
型号: M37905F8CSP
PDF下载: 下载PDF文件 查看货源
内容描述: 16位微机的CMOS [16-BIT CMOS MICROCOMPUTER]
分类和应用: 微控制器和处理器外围集成电路光电二极管计算机时钟
文件页数/大小: 35 页 / 489 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
 浏览型号M37905F8CSP的Datasheet PDF文件第17页浏览型号M37905F8CSP的Datasheet PDF文件第18页浏览型号M37905F8CSP的Datasheet PDF文件第19页浏览型号M37905F8CSP的Datasheet PDF文件第20页浏览型号M37905F8CSP的Datasheet PDF文件第22页浏览型号M37905F8CSP的Datasheet PDF文件第23页浏览型号M37905F8CSP的Datasheet PDF文件第24页浏览型号M37905F8CSP的Datasheet PDF文件第25页  
MITSUBISHI MICROCOMPUTERS  
M37905F8CFP, M37905F8CSP  
16-BIT CMOS MICROCOMPUTER  
Table 2. Software commands (CPU reprogramming mode)  
1st cycle  
2nd cycle  
Command  
Data  
(D0 to D7)  
Mode  
Address  
Data  
Mode  
Address  
Read Array  
FF16  
7016  
5016  
4016  
2016  
2016  
Write  
Write  
Write  
Write  
Write  
Write  
X (Note 2)  
Read  
X
SRD (Note 3)  
Read Status Register  
Clear Status Register  
Programming  
X
X
X
X
X
Write  
WA (Note 4) WD (Note 4)  
Block Erase  
Write BA (Note 5)  
Write  
D016  
2016  
Erase All Block  
X
Notes 1: At software commandsinput, the high-order byte of data (D8D15) is ignored.  
2: X = An arbitrary address in the user ROM area. (Note that A0 = 0.)  
3: SRD = Status Register Data  
4: WA = Write Address, WD = Write Data (16 bits).  
5: Block address: the maximum address of each block must be input. Note that address A0 = 0.  
Block Erase Command (2016/D016)  
Writing command code 2016at the 1st bus cycle and writing confir-  
mation command code D016and the maximum address of the  
block (Note that address A0 = 0.) at the subsequent 2nd bus cycle  
initiate the automatic erase (erasing and erase verification) operation  
for the specified block.  
The completion of the automatic erase operation is confirmed by a  
read of the flash memory control register. The RY/BY status bit of the  
flash memory control register goes 0simultaneously with start of  
the automatic erase operation; and also, it goes 1simultaneously  
with completion of it.  
Before execution of the next command, be sure to confirm that the  
RY/BY status bit is set to 1(READY). During the automatic erase  
operation, writing of commands and access to the flash memory  
must not be performed.  
Simultaneously with start of the automatic erase, the read status reg-  
ister mode is automatically active. In this case, the read status regis-  
ter mode is retained until the next read array command (FF16) is  
written or until the reset is performed by using the flash memory re-  
set bit.  
Reading out the status register after the automatic erase operation  
is completed reports the result of it. For details, refer to the section  
on the status register.  
Figure 10 shows an example of the block erase flowchart.  
20  
 复制成功!