MITSUBISHI MICROCOMPUTERS
M37754M8C-XXXGP, M37754M8C-XXXHP
M37754S4CGP, M37754S4CHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
WhenA-D or D-A conversion is not performed, current from the VREF
pin to the ladder network can be cut off by disconnecting ladder net-
D-A CONVERTER
The D-A converter is an 8-bit R-2R method D-A converter and con-
sists of two independent D-A converters. Figure 72 shows the block
diagram of the D-A converter and Figure 73 shows the bit configura-
tion of A-D control register 1.
work from the VREF pin.
Before starting A-D or D-A conversion, wait for 1 µs or more after
clearing bit 5 to “0”. An external buffer must be connected when con-
necting to a low impedance load because there is no built-in D-A out-
put buffer.
D-A conversion is performed by writing a value in the corresponding
D-A register. The conversion result is output by bits 6 and 7 of A-D
control register 1 (address 1F16). When bit 7 is “1”, the conversion
result is output from DA0 pin.
7
6
5
4
×
3
×
2
×
1
×
0
×
Address
1F16
When bit 6 is “1”, the conversion result is output from DA1pin.
The output analog voltage V is determined according to the value n
(“n” is a decimal number) set in the D-A register.
A-D control register 1
Not used for D-A converter
VREF connection select bit (Note)
0 : VREF is connected
1 : VREF is not connected
D-A1 output enable bit
0 : Disable output
V = VREF × n/256 (n = 0 to 255)
VREF : Reference voltage
1 : Enable output
D-A0 output enable bit
0 : Disable output
1 : Enable output
The D-A output enable bit is cleared to “0” at reset. Whether to con-
nect the reference voltage input (VREF) with the ladder network or not
depends on bit 5 of the A-D control register 1. The VREF pin is con-
nected when bit 5 is “0” and is disconnected when bit 5 is “1” (High
impedance state).
Note : When the expansion function select bit (bit 5 of peripheral
function select register 1 ; refer to Fig. 62) is “1,” bit 5 can be
written and changed.
Fig. 73 A-D control register 1 bit configuration
Data bus (even)
VREF connection
select
D-A register 0
(Address 6816)
D-A register 1
(Address 6A16)
VREF
R-2R ladder network
R-2R ladder network
AVSS
AVSS
D-A0 output
enable bit
D-A1 output
enable bit
D-A0 pin
D-A1 pin
Fig. 72 D-A converter block diagram
60
RENESAS [ RENESAS TECHNOLOGY CORP ]
