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M37272E8SP 参数 Datasheet PDF下载

M37272E8SP图片预览
型号: M37272E8SP
PDF下载: 下载PDF文件 查看货源
内容描述: 单片8位CMOS单片机结合闭合字幕解码器和屏幕显示控制器 [SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER]
分类和应用: 解码器显示控制器外围集成电路光电二极管微控制器瞄准线计算机可编程只读存储器时钟
文件页数/大小: 143 页 / 1999 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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MITSUBISHI MICROCOMPUTERS
M37272M6/M8–XXXSP/FP, M37272MA–XXXSP
M37272E8SP/FP, M37272EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
Table 7.2 Pin Description (continued)
Pin
P3
0
/AD5,
P3
1
/AD6
Name
I/O port P3
Input/
Output
I/O
Functions
Ports P3
0
and P3
1
are a 2-bit I/O port and has basically the same functions as port 0.
The output structure can be selected either CMOS output or N-channel open-drain output
structure. (See notes 1, 3)
Pins P3
0
and P3
1
are also used as analog input pins AD5 and AD6 respectively.
Pin P5
0
and P5
1
are 2-bit input ports.
Pin P5
0
is also used as H
SYNC
input. This is a horizontal synchronous signal input for OSD.
Pin P5
1
is also used as V
SYNC
input. This is a vertical synchronous signal input for OSD.
Ports P5
2
–P5
5
are a 4-bit output port. The output structure is CMOS output.
Pins P5
2
–P5
5
are also used as OSD output pins R, G, B, OUT1 respectively. The output
structure is CMOS output.
Input composite video signal through a capacitor.
Connect a capacitor between V
HOLD
and Vss.
Connect a filter using of a capacitor and a resistor between HLF and Vss.
Analog input
P5
0
/H
SYNC
, Input port P5
P5
1
/V
SYNC
P5
2
/R,
P5
3
/G,
P5
4
/B,
P5
5
/OUT1
CV
IN
V
HOLD
HLF
H
SYNC
input
V
SYNC
input
Output port P5
OSD output
I/O for data slicer
Input
Input
Input
Input
Output
Output
Input
Input
I/O
Notes 1:
Port Pi (i = 0 to 3) has the port Pi direction register which can be used to program each bit as an input (“0”) or an output (“1”). The pins programmed as “1”
in the direction register are output pins. When pins are programmed as “0,” they are input pins. When pins are programmed as output pins, the output data
are written into the port latch and then output. When data is read from the output pins, the output pin level is not read but the data of the port latch is read.
This allows a previously-output value to be read correctly even if the output LOW voltage has risen, for example, because a light emitting diode was directly
driven. The input pins are in the floating state, so the values of the pins can be read. When data is written into the input pin, it is written only into the port
latch, while the pin remains in the floating state.
2:
To switch output functions, set the raster color register and OSD control register. When pins P2
6
and P2
7
are used as the OSD clock input/output pins, set
the corresponding bits of the port P2 direction register to “0” (input mode).
3:
To switch output structures, set bits 2 and 3 of the port P3 direction register, When “0,” CMOS output ; when “1,” N-channel open-drain output.
Rev. 1.4
8