INT1
INT2
INT3
SDA2
SDA1
SCL2
SCL1
S
IN
S
CLK
S
OUT
PWM5
PWM4
PWM3
PWM2
PWM1
PWM0
AD1–6
10 9 8 7 6 5 4 3
13 12 11 36 37 38
26 27
28 29 30 31 32 33 34 35
I/O port P0
I/O port P2
I/O port P1
I/O ports P3
0
, P3
1
Output ports P5
2
–P5
5
Output for display Input ports P5
0
, P5
1
Synchronous signal input
OUT1
B
G
R
V
SYNC
H
SYNC
4
V
SS
CNV
SS
21
18
17
24
23
16
15
Clock input Clock output
Pins for data slicer
CV
IN
V
HOLD
HLF
25
14
22
X
IN
X
OUT
Reset input
RESET AV
CC
V
CC
I/O ports P2
6
, P2
7
Clock input for Clock output for OSD/
OSD/sub-clock input sub-clock output
OSC1/X
CIN
OSC2/X
COUT
19
20
Clock
generating
circuit
Data slicer
Data bus
Timer count source
selection circuit
TIM2
TIM3
Fig. 5.1 Functional Block Diagram of M37272
Program
counter
5. FUNCTIONAL BLOCK DIAGRAM
ROM correction
circuit
ROM
PC
L
(8)
Timer 2
T2 (8)
Timer 3
T3 (8)
RAM
Progam
counter
Timer 1
T1 (8)
PC
H
(8)
Address bus
Timer 4
T4 (8)
Control signal
Index
register
8-bit
arithmetic
and
logical unit
X (8)
Y (8)
Instruction
register (8)
Stack
pointer
S (8)
Timer 5
T5 (8)
Timer 6
T6 (8)
Instruction
decoder
Accumulator
A (8)
Processor
status
register
PS (8)
Index
register
OS D
circuit
A-D
comparator
SI/O
P 2 ( 8)
P 3 ( 2)
Multi-master
I2C-BUS
interface
PWM
P 5 ( 6)
P1
0
OUT2
P 0 ( 8)
P 1 ( 8)
39 40 41 42 2 1
MITSUBISHI MICROCOMPUTERS
M37272M6/M8–XXXSP/FP, M37272MA–XXXSP
M37272E8SP/FP, M37272EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
Rev. 1.3
RENESAS [ RENESAS TECHNOLOGY CORP ]
