MITSUBISHI MICROCOMPUTERS
M37272M6/M8–XXXSP/FP, M37272MA–XXXSP
M37272E8SP/FP, M37272EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
7. PIN DESCRIPTION
Table 7.1 Pin Description
Pin
Name
Input/
Output
Functions
Apply voltage of 5 V ± 10 % to (typical) V
CC
and AV
CC
, and 0 V to V
SS
.
This is connected to V
SS
.
Input
To enter the reset state, the reset input pin must be kept at a LOW for 2
µs
or more (under
normal V
CC
conditions).
If more time is needed for the quartz-crystal oscillator to stabilize, this LOW condition should
be maintained for the required time.
This chip has an internal clock generating circuit. To control generating frequency, an
external ceramic resonator or a quartz-crystal oscillator is connected between pins X
IN
and
X
OUT
. If an external clock is used, the clock source should be connected to the X
IN
pin and
the X
OUT
pin should be left open.
Port P0 is an 8-bit I/O port with direction register allowing each I/O bit to be individually
programmed as input or output. At reset, this port is set to input mode. The output structure
is N-channel open-drain output. (See note 1)
Pins P0
0
–P0
5
are also used as PWM output pins PWM0–PWM5 respectively. The output
structure is N-channel open-drain output.
Pins P0
6
and P0
7
are also used as INT external interrupt input pins INT2 and INT1 respectively.
P0
6
pin is also used as analog input pin AD4.
Port P1 is an 8-bit I/O port and has basically the same functions as port P0. The output
structure is CMOS output. (See note 1)
Pins P1
0
is also used as OSD output pin OUT2. The output structure is CMOS output.
Pins P1
1
–P1
4
are used as SCL1, SCL2, SDA1 and SDA2 respectively, when multi-master
I
2
C-BUS interface is used. The output structure is N-channel open-drain output.
Pins P1
0
, P1
5
–P1
7
are also used as analog input pin AD8, AD1–AD3 respectively.
P1
5
pin is also used as INT external interrupt input pin INT3.
Port P2 is an 8-bit I/O port and has basically the same functions as port P0. The output
structure is CMOS output. (See note 1)
P2
0
pin is also used as serial I/O synchronous clock input/output pin S
CLK
. The output
structure is N-channel open-drain output.
P2
1
pin is also used as serial I/O data output pin S
OUT
. The output structure is open-drain
output.
P2
2
pin is also used as serial I/O data input pin S
IN
.
Pins P2
3
and P2
4
are also used as timer external clock input pins TIM3 and TIM2
respectively.
P2
6
pin is also used as OSD clock input pin OSC1. (See note 2)
P2
7
pin is also used as OSD clock input pin OSC2. The output structure is CMOS output.
(See note 2)
P2
6
pin is also used as sub-clock input pin X
CIN
.
P2
7
pin is also used as sub-clock output pin X
COUT
.
V
CC
, AV
CC
, Power source
V
SS
CNV
SS
RESET
CNV
SS
Reset input
X
IN
X
OUT
Clock input
Clock output
Input
Output
I/O
P0
0
/PWM0– I/O port P0
P0
5
/PWM5,
P0
6
/INT2/AD4,
P0
7
/INT1
PWM output
External interrupt
input
Analog input
P1
0
/OUT2, I/O port P1
P1
1
/SCL1,
P1
2
/SCL2, OSD output
P1
3
/SDA1,
P1
4
/SDA2,
P1
5
/AD1/INT3,
P1
6
/AD2,
P1
7
/AD3
P2
0
/S
CLK
,
P2
1
/S
OUT
,
P2
2
/S
IN
,
P2
3
/TIM3,
P2
4
/TIM2,
P2
5
,
P2
6
/OSC1/
X
CIN
,
P2
7
/OSC2/
X
COUT
Multi-master
I
2
C-BUS interface
Analog input
External interrupt
input
I/O port P2
Serial I/O synchronous
clock input/output port
Serial I/O data
output
Serial I/O data input
External clock
input for timer
Clock input for OSD
Clock output for OSD
Sub-clock input
Sub-clock output
Output
Input
Input
I/O
Output
I/O
Input
Input
I/O
I/O
I/O
Input
Input
Input
Output
Input
Output
Rev. 1.4
7
RENESAS [ RENESAS TECHNOLOGY CORP ]
