M37221M4H/M6H/M8H/MAH–XXXSP/FP M37221EASP/FP
OSD Control Register
b7 b6 b5 b4 b3 b2 b1 b0
OSD control register (CC) [Address 00EA16
]
Functions
After reset
0
R
R
W
W
B
0
Name
0 : All-blocks display off
1 : All-blocks display on
All-blocks display control
bit (CC0) (See note)
0 : Block 1 display off
1 : Block 1 display on
0
0
0
R
R
R
W
W
—
1
2
Block 1 display control bit
(CC1)
Block 2 display control bit
(CC2)
0 : Block 2 display off
1 : Block 2 display on
3
to
6
Nothing is assigned. These bits are write disable bits.
When these bits are read out, the values are “0.”
P1
(CC7)
0
/OUT2 pin switch bit
0 : P1
1 : OUT2
0
0
R
W
7
Note: Display is controlled by logical product (AND) between the all-blocks display
control bit and each block control bit.
Fig. 8.11.3 OSD Control Register
Rev.1.00 Oct 01, 2002 page 57 of 110
REJ03B0134-0100Z