M37221M4H/M6H/M8H/MAH–XXXSP/FP M37221EASP/FP
The vertical display start position for each block can be set in 512
steps (where each step is 1TH (TH: HSYNC cycle)) as values “0016” to
“7F16” in vertical position register i (i = 1 and 2) (addresses 00E116
and 00E216) The vertical position register i is shown in Figure 8.11.6.
Vertical Position Register i
b7 b6 b5 b4 b3 b2 b1 b0
Vertical position register i (CVi) (i = 1 and 2) [Addresses 00E116, 00E216
]
B
Name
Functions
After reset
R
R
W
W
0
to
6
128 steps (0016 to 7F16
)
Indeterminate
Vertical display start positions
(CVi : CVi0 to CVi6)
7
Nothing is assigned. This bit is a write disable bit.
When this bit is read out, the value is “0.”
0
R
—
Fig. 8.11.6 Vertical Position Register i
Rev.1.00 Oct 01, 2002 page 60 of 110
REJ03B0134-0100Z
RENESAS [ RENESAS TECHNOLOGY CORP ]
