M37221M4H/M6H/M8H/MAH–XXXSP/FP M37221EASP/FP
Ports P00–P05, P32
N-channel open drain output
Ports P00–P05, P32
Direction register
Port latch
Data bus
Note: Each port is also used as follows:
P00–P05 : PWM0–PWM5
Ports P1, P2, P30, P31
Direction register
Port latch
CMOS output
Ports P1, P2, P30, P31
Data bus
Notes 1: Each port is also used as follows:
P10 : OUT2
P11 : SCL1
P12 : SCL2
P13 : SDA1
P14 : SDA2
P20 : SCLK
P21 : SOUT
P22 : SIN
P23 : TIM3
P24 : TIM2
P15 : A-D1/INT3 P30 : A-D5/DA1
P16 : A-D2
P17 : A-D3
P31 : A-D6/DA2
2
2: The output structure of ports P11–P14 is N-channel open-drain output when using as multi-master I C-BUS inter
face (it is the same with ports P06 and P07 )
3: The output structure of ports P30 and P31 can be selected either CMOS output or N-channel open-drain output
(it is the same with ports P06 and P07 )
Ports P06, P07
N-channel open-drain output
Direction register
Ports P06, P07
Port latch
Data bus
Note: Each port is also used as follow:
P06 : INT2/A-D4
P07 : INT1
Fig. 7.1 I/O pin block diagram (1)
Rev.1.00 Oct 01, 2002 page 10 of 110
REJ03B0134-0100Z