MULTIJUNCTION TIMERS
10.3 TOP (Output-Related 16-Bit Timer)
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10.3.2 Outline of Each Mode of TOP
Each mode of TOP is outlined below. For each TOP channel, only one of the following modes can be selected.
(1) Single-shot output mode
In single-shot output mode, the timer generates a pulse in width of (reload register set value + 1) only once
and then stops.
When the timer is enabled (by writing to the enable bit in software or by external input) after setting the reload
register, the counter is loaded with the content of the reload register and starts counting synchronously with
the count clock. The counter counts down and stops when it underflows after reaching the minimum count.
The F/F output waveform in single-shot output mode is inverted at startup and upon underflow, generating a
single-shot pulse waveform in width of (reload register set value + 1) only once. An interrupt request can be
generated when the counter underflows.
(2) Delayed single-shot output mode
In delayed single-shot output mode, the timer generates a pulse in width of (reload register set value + 1)
after a finite time equal to (counter set value + 1) only once and then stops.
When the timer is enabled (by writing to the enable bit in software or by external input) after setting the
counter and reload register, it starts counting down from the counter’s set value synchronously with the count
clock. The first time the counter underflows, it is loaded with the reload register value and continues counting
down. The counter stops when it underflows next time.
The F/F output waveform in delayed single-shot output mode is inverted when the counter underflows first
time and next, generating a single-shot pulse waveform in width of (reload register set value + 1) after a finite
time equal to (first set value of counter + 1) only once.
An interrupt request can be generated when the counter underflows first time and next.
(3) Continuous output mode
In continuous output mode, the timer counts down starting from the set value of the counter and when the
counter underflows, it is loaded with the reload register value. Thereafter, this operation is repeated each
time the counter underflows, thus generating consecutive pulses whose waveform is inverted in width of
(reload register set value + 1).
When the timer is enabled (by writing to the enable bit in software or by external input) after setting the
counter and reload register, it starts counting down from the counter’s set value synchronously with the count
clock and when the minimum count is reached, generates an underflow. This underflow causes the counter
to be loaded with the content of the reload register and start counting over again. Thereafter, this operation is
repeated each time an underflow occurs. To stop the counter, disable count by writing to the enable bit in
software.
The F/F output waveform in continuous output mode is inverted at startup and upon underflow, generating a
waveform of consecutive pulses until the timer stops counting. An interrupt request can be generated each
time the counter underflows.
32180 Group User’s Manual (Rev.1.0)
10-66
RENESAS [ RENESAS TECHNOLOGY CORP ]
