INTERRUPT CONTROLLER (ICU)
5.5 Description of Interrupt Operation
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[10] Restoring the Interrupt Request Mask Register (IMASK)
Restore the Interrupt Request Mask Register that was saved to the stack in [2].
[11] Restoring registers from the stack
Restore the registers that were saved to the stack in [1].
[12] Completion of external interrupt processing
Execute the RTE instruction to complete the external interrupt processing. The program returns to the
state in which it was before the currently processed interrupt request was accepted.
(3) Identifying the source of the interrupt request generated
If any internal peripheral I/O has two or more interrupt request sources, check the Interrupt Request Status
Register provided for each internal peripheral I/O to identify the source of the interrupt request generated.
(4) Enabling multiple interrupts
To enable multiple interrupts in the interrupt handler, set the PSW register IE (Interrupt Enable) bit to enable
interrupt requests to be accepted. However, before writing "1" to the IE bit, be sure to save each register
(BPC, PSW, general-purpose registers and IMASK) to the stack.
Note: • Before enabling multiple interrupts, read the Interrupt Vector Register (IVECT) and then the ICU
vector table, as shown in Figure 5.5.2, “Typical Handler Operation for Interrupts from Internal
Peripheral I/O.”
32180 Group User’s Manual (Rev.1.0)
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