M16C/62 Group (M16C/62P, M16C/62PT)
4. SFR
Address
Register
Symbol
After reset
0380h
Count start flag
Clock prescaler reset flag
One-shot start flag
Trigger select register
TABSR
CPSRF
ONSF
TRGSR
UDF
00h
0XXXXXXXb
00h
0381h
0382h
0383h
00h
Up-down flag
00h (2)
0384h
0385h
0386h
Timer A0 register
TA0
TA1
TA2
TA3
TA4
TB0
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
00h
00h
00h
00h
0387h
0388h
Timer A1 register
0389h
038Ah
Timer A2 register
038Bh
038Ch
Timer A3 register
038Dh
038Eh
Timer A4 register
038Fh
0390h
Timer B0 register
0391h
0392h
Timer B1 register
TB1
TB2
0393h
0394h
Timer B2 register
0395h
0396h
Timer A0 mode register
Timer A1 mode register
Timer A2 mode register
Timer A3 mode register
Timer A4 mode register
Timer B0 mode register
Timer B1 mode register
Timer B2 mode register
TA0MR
TA1MR
TA2MR
TA3MR
TA4MR
TB0MR
TB1MR
TB2MR
TB2SC
0397h
0398h
0399h
039Ah
00h
039Bh
00XX0000b
00XX0000b
00XX0000b
039Ch
039Dh
039Eh
Timer B2 special mode register
XXXXXX00b
039Fh
03A0h
UART0 transmit/receive mode register
UART0 bit rate generator
UART0 transmit buffer register
U0MR
U0BRG
U0TB
00h
XXh
XXh
XXh
00001000b
00000010b
XXh
XXh
00h
XXh
XXh
XXh
00001000b
00000010b
XXh
XXh
X0000000b
03A1h
03A2h
03A3h
03A4h
UART0 transmit/receive control register 0
UART0 transmit/receive control register 1
UART0 receive buffer register
U0C0
U0C1
U0RB
03A5h
03A6h
03A7h
03A8h
UART1 transmit/receive mode register
UART1 bit rate generator
UART1 transmit buffer register
U1MR
U1BRG
U1TB
03A9h
03AAh
03ABh
03ACh UART1 transmit/receive control register 0
03ADh
U1C0
U1C1
U1RB
UART1 transmit/receive control register 1
03AEh
UART1 receive buffer register
03AFh
03B0h
UART transmit/receive control register 2
UCON
03B1h
03B2h
03B3h
03B4h
03B5h
03B6h
03B7h
03B8h
DMA0 request cause select register
DM0SL
DM1SL
00h
00h
03B9h
03BAh DMA1 request cause select register
03BBh
03BCh
CRC data register
CRCD
CRCIN
XXh
XXh
XXh
03BDh
03BEh
CRC input register
03BFh
NOTES :
1.The blank areas are reserved and cannot be accessed by users.
2. Bits 7 to 5 in the Up-down flag are “0” by reset. However, The values in these bits when read are indeterminate.
X : Nothing is mapped to this bit
page 28
Rev.2.10 Nov. 07, 2003
of 84
RENESAS [ RENESAS TECHNOLOGY CORP ]
