3. Memory
M16C/62 Group (M16C/62P, M16C/62PT)
3. Memory
Figure 3.1 is a memory map of the M16C/62P group. The address space extends the 1M bytes from
address 00000h to FFFFFh.
The internal ROM is allocated in a lower address direction beginning with address FFFFFh. For example, a
64-Kbyte internal ROM is allocated to the addresses from F0000h to FFFFFh.
As for the flash memory version, 4-Kbyte space (block A) exists in 0F000h to 0FFFFh. 4-Kbyte space is
mainly for storing data. In addition to storing data, 4-Kbyte space also can store programs.
The fixed interrupt vector table is allocated to the addresses from FFFDCh to FFFFFh. Therefore, store the
start address of each interrupt routine here.
The internal RAM is allocated in an upper address direction beginning with address 00400h. For example,
a 10-Kbyte internal RAM is allocated to the addresses from 00400h to 02BFFh. In addition to storing data,
the internal RAM also stores the stack used when calling subroutines and when interrupts are generated.
The SRF is allocated to the addresses from 00000h to 003FFh. Peripheral function control registers are
located here. Of the SFR, any area which has no functions allocated is reserved for future use and cannot
be used by users.
The special page vector table is allocated to the addresses from FFE00h to FFFDBh. This vector is used by
the JMPS or JSRS instruction. For details, refer to the M16C/60 and M16C/20 Series Software Manual.
In memory expansion and microprocessor modes, some areas are reserved for future use and cannot be
used by users. Use M16C/62P (80-pin version) and M16C/62PT in single-chip mode. The memory expan-
sion and microprocessor modes cannot be used.
00000h
SFR
00400h
Internal RAM
XXXXXh
Reserved area (1)
FFE00h
0F000h
Internal ROM
(data area) (3)
0FFFFh
Special page
vector table
10000h
Internal ROM (3)
Internal RAM
External area
Size
Address XXXXXh
013FFh
Size
Address YYYYYh
27000h
28000h
4K bytes
5K bytes
48K bytes
64K bytes
F4000h
F0000h
Reserved area
External area
FFFDCh
Undefined instruction
Overflow
BRK instruction
Address match
Single step
017FFh
96K bytes
128K bytes
192K bytes
E8000h
E0000h
D0000h
10K bytes
12K bytes
16K bytes
02BFFh
033FFh
043FFh
80000h
Reserved area (2)
20K bytes
053FFh
256K bytes
320K bytes
384K bytes
512K bytes
C0000h
B0000h
YYYYYh
Watchdog timer
24K bytes
31K bytes
063FFh
07FFFh
DBC
NMI
Reset
Internal ROM
(program area)
A0000h
80000h
FFFFFh
FFFFFh
NOTES:
1. During memory expansion and microprocessor modes, can not be used.
2. In memory expansion mode, can not be used.
3. As for the flash memory version, 4-Kbyte space (block A) exists.
4. Shown here is a memory map for the case where the PM10 bit in the PM1 register is “1”
and the PM13 bit in the PM1 register is “1”.
Figure 3.1 Memory Map
page 23
Rev.2.10 Nov. 07, 2003
of 84
RENESAS [ RENESAS TECHNOLOGY CORP ]
