1. Overview
M16C/62 Group (M16C/62P, M16C/62PT)
PIN CONFIGURATION (top view)
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
40
61
62
63
P4_3
P0_6/AN0_6
P0_5/AN0_5
P0_4/AN0_4
P0_3/AN0_3
P0_2/AN0_2
39
38
P5_0
P5_1
64
65
66
67
68
37
36
P5_2
P5_3
35
34
33
32
P0_1/AN0_1
P0_0/AN0_0
P10_7/AN7/KI3
P10_6/AN6/KI2
P10_5/AN5/KI1
P10_4/AN4/KI0
P10_3/AN3
P10_2/AN2
P10_1/AN1
AVSS
P5_4
P5_5
P5_6
69
70
71
72
73
74
P5_7/CLKOUT
P6_0/CTS0/RTS0
P6_1/CLK0
P6_2/RXD0/SCL0
P6_3/TXD0/SDA0
31
30
29
M16C/62 Group
(M16C/62P, M16C/62PT)
28
27
26
P6_4/CTS1/RTS1/CTS0/CLKS1
P6_5/CLK1
75
76
25
24
23
P10_0/AN0
VREF
P6_6/RXD1/SCL1
77
78
79
80
P6_7/TXD1/SDA1
(1)
AVCC
P7_0/TXD2/SDA2/TA0OUT
P7_1/RXD2/SCL2/TA0IN/TB5IN
P7_6/TA3OUT
(1)
22
21
P9_7/ADTRG/SIN4
P9_6/ANEX1/SOUT4
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20
Package: 80P6S-A
NOTES:
1. P7_0 and P7_1 are N channel open-drain output pins.
Figure 1.8 Pin Configuration (Top View)
page 15
Rev.2.10 Nov. 07, 2003
of 84