12.2.8
Bit Rate Register (BRR)
Bit
7
6
5
4
3
2
1
0
Initial value
Read/Write
1
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
BRR is an 8-bit register that, together with the CKS1 and CKS0 bits in SMR, determines the bit
rate output by the baud rate generator.
BRR is initialized to H'FF by a reset and in the standby modes.
Tables 12.3 and 12.6 show examples of BRR settings.
Table 12.3 Examples of BRR Settings in Asynchronous Mode (When øP = ø)
ø (MHz)
2
2.097152
Error
(%)
Bit Rate
(bits/s)
Error
(%)
n
1
N
n
1
N
110
141 +0.03
103 +0.16
207 +0.16
103 +0.16
148 –0.04
108 +0.21
217 +0.21
108 +0.21
150
1
1
300
0
0
600
0
0
1200
2400
4800
9600
19200
31250
38400
0
51
25
12
—
—
1
+0.16
+0.16
+0.16
—
0
54
26
13
6
–0.70
+1.14
–2.48
–2.48
—
0
0
0
0
—
—
0
0
—
—
—
—
—
—
—
0
—
—
—
—
—
246
RENESAS [ RENESAS TECHNOLOGY CORP ]
