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HD64F3337YF16 参数 Datasheet PDF下载

HD64F3337YF16图片预览
型号: HD64F3337YF16
PDF下载: 下载PDF文件 查看货源
内容描述: 单片机 [Single-Chip Microcomputer]
分类和应用: 微控制器和处理器外围集成电路
文件页数/大小: 747 页 / 2993 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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9.3.2  
Compare-Match Timing  
Setting of Compare-Match Flags A and B (CMFA and CMFB): The compare-match flags are  
set to 1 by an internal compare-match signal generated when the timer count matches the time  
constant in TCORA or TCORB. The compare-match signal is generated at the last state in which  
the match is true, just before the timer counter increments to a new value.  
Accordingly, when the timer count matches one of the time constants, the compare-match signal is  
not generated until the next period of the clock source. Figure 9.4 shows the timing of the setting  
of the compare-match flags.  
ø
TCNT  
TCOR  
N
N
N + 1  
Internal compare-  
match signal  
CMF  
Figure 9.4 Setting of Compare-Match Flags  
203  
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