8.1.2
Block Diagram
Figure 8.1 shows a block diagram of the free-running timer.
Internal
clock sources
ø /2
ø /8
P
External
clock source
P
ø /32
FTCI
P
Clock
Clock select
OCRA (H/L)
Comparator A
FRC (H/L)
Compare-
match A
FTOA
Overflow
FTOB
Clear
Internal
data bus
Comparator B
OCRB (H/L)
Compare-
match B
Control
logic
Capture
ICRA (H/L)
ICRB (H/L)
FTIA
FTIB
ICRC (H/L)
ICRD (H/L)
FTIC
FTID
TCSR
TIER
TCR
TOCR
ICIA
ICIB
ICIC
ICID
OCIA
OCIB
FOVI
Interrupt signals
Legend:
OCRA, B:
FRC:
Output compare register A, B (16 bits)
Free-running counter (16 bits)
TIER: Timer interrupt enable register (8 bits)
TCR: Timer control register (8 bits)
TOCR: Timer output compare control
register (8 bits)
ICRA, B, C, D: Input capture register A, B, C, D (16 bits)
TCSR: Timer control/status register (8 bits)
Figure 8.1 Block Diagram of 16-Bit Free-Running Timer
158
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