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HD64F36077G 参数 Datasheet PDF下载

HD64F36077G图片预览
型号: HD64F36077G
PDF下载: 下载PDF文件 查看货源
内容描述: 旧公司名称在产品目录等资料 [Old Company Name in Catalogs and Other Documents]
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文件页数/大小: 566 页 / 3220 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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Section 19 Band-Gap Circuit, Power-On Reset, and Low-Voltage Detection Circuits  
Low Voltage Detection Interrupt (LVDI) Circuit  
(When Voltages Input via ExtU and ExtD Pins are used for Detection):  
Figure 19.6 shows the timing of the LVDI circuit. The LVDI circuit is enabled after a power-on  
reset, however, the interrupt request is disabled. To enable the LVDI, the LVDDF and LVDUF  
bits in LVDSR must be cleared to 0 and the LVDDE or LVDUE bit in LVDCR must be set to 1.  
When using external compared voltage, write 0 to the VDDII bit in LVDCR, and wait for 50 µs  
(tLVDON) given by a software timer until the detection circuit has settled. Then clear the LVDDF and  
LVDUF bits to 0 and set the LVDDE or LVDUE bit to 1. After that, the output settings of ports  
must be made. The initial value of the external compared voltages input on the ExtU and ExtD  
pins must be higher than the Vexd voltage.  
When the external comparison voltage of ExtD pin falls below the Vexd (D) (Typ. = 1.15 V)  
voltage, the LVDI clears the LVDINT signal to 0 and sets the LVDDF bit in LVDSR to 1. If the  
LVDDE bit is 1 at this time, an IRQ0 interrupt request is generated. In this case, the necessary  
data must be saved in the external EEPROM, and a transition to standby mode or subsleep mode  
must be made. Until this processing is completed, the power supply voltage must be higher than  
the lower limit of the guaranteed operating voltage.  
When the power-supply voltage does not fall below the Vreset1 (Typ. = 2.3 V) voltage and the  
input voltage of the ExtU pin rises above Vexd (Typ. = 1.15 V) voltage, the LVDI circuit sets the  
LVDINT signal to 1. If the LVDUE bit is 1 at this time, the LVDUF bit in LVDSR is set to 1 and  
an IRQ0 interrupt request is generated.  
If the power supply voltage falls below the Vreset1 (Typ. = 2.3 V) voltage, this LSI enters low-  
voltage detection reset operation. When the voltages input on the ExtU and ExtD pins are used as  
the compared voltage, ensure to use the LVDR (reset detection voltage: Typ. = 2.3 V) circuit.  
Rev. 3.00 Sep. 10, 2007 Page 390 of 528  
REJ09B0216-0300  
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